PSB 21150 H V1.4 Infineon Technologies, PSB 21150 H V1.4 Datasheet - Page 217
PSB 21150 H V1.4
Manufacturer Part Number
PSB 21150 H V1.4
Description
IC MODULAR ISDN NT INTELL MQFP64
Manufacturer
Infineon Technologies
Datasheet
1.PSB_21150_F_V1.4.pdf
(270 pages)
Specifications of PSB 21150 H V1.4
Function
PC Adapter Circuit
Interface
HDLC, ISDN, SCI
Number Of Circuits
1
Voltage - Supply
3.3V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-QFP
Includes
Activation and Deactivation, D-Channel Access Control, Monitor Channel Handler
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PSB21150HV1.4X
PSB21150HV14XP
SP000007578
PSB21150HV14XP
SP000007578
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IPAC-X
PSB/PSF 21150
Detailed Register Description
4.4.20
MOCR - MONITOR Control Register
Value after reset: 00
H
7
0
MOCR
MRE
MRC
MIE
MXC
0
0
0
0
RD/WR (5E)
MRE ... MONITOR Receive Interrupt Enable
0: MONITOR interrupt status MDR generation is masked
1: MONITOR interrupt status MDR generation is enabled
MRC ... MR Bit Control
Determines the value of the MR bit:
0:MR is always ’1’. In addition, the MDR interrupt is blocked, except for the first byte of
a packet (if MRE = 1).
1:MR is internally controlled by the IPAC-X according to MONITOR channel protocol.
In addition, the MDR interrupt is enabled for all received bytes according to the
MONITOR channel protocol (if MRE = 1).
MIE ... MONITOR Interrupt Enable
MONITOR interrupt status MER, MDA, MAB generation is enabled (1) or masked (0).
MXC ... MX Bit Control
Determines the value of the MX bit:
0:The MX bit is always ’1’.
1:The MX bit is internally controlled by the IPAC-X according to MONITOR channel
protocol.
Data Sheet
217
2003-01-30
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