ISD5008EYI Nuvoton Technology Corporation of America, ISD5008EYI Datasheet
ISD5008EYI
Specifications of ISD5008EYI
Related parts for ISD5008EYI
ISD5008EYI Summary of contents
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ISD5008 3V, SINGLE-CHIP VOICE RECORD/PLAYBACK DEVICE 4- TO 8-MINUTES DURATION - 1 - ISD5008 Publication Release Date: Oct 31 2008 Revision 1.2 ...
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Table of Contents 1 GENERAL DESCRIPTION .............................................................................................................. 3 2 FEATURES ...................................................................................................................................... 4 3 BLOCK DIAGRAM ........................................................................................................................... 5 4 PIN CONFIGURATION .................................................................................................................... 6 5 PIN DESCRIPTION .......................................................................................................................... 7 6 FUNCTIONAL DESCRIPTION ....................................................................................................... 10 6 ETAILED ESCRIPTION 6.1.1 Speech/Sound Quality ...
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GENERAL DESCRIPTION The ISD5008 ChipCorder product fully-integrated, single-chip solution which provides seamless integration of enhanced voice record and playback features for digital cellular phones (GSM, CDMA, TDMA, PDC, and PHS), automotive communications, GPS/navigation systems, and portable ...
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FEATURES Fully-Integrated Solution Single-chip voice record/playback solution • Integrated sampling clock, anti-aliasing and smoothing filters, and MLS array • Integrated analog features such as automatic gain control (AGC), audio gating switches, speaker • driver, summing amplifiers, volume control, and ...
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BLOCK DIAGRAM 6dB 6dB MICROPHONE MICROPHONE MIC+ MIC+ MIC IN MIC IN AGC AGC MIC - MIC - 1 1 (AGPD) (AGPD) AGCCAP AGCCAP FILTO FILTO AUX IN AUX IN CAR KIT CAR KIT ANA IN ANA IN 1 ...
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PIN CONFIGURATION SSA RAC 3 INT 4 XCLK CCD V 7 CCD SCLK MOSI 10 MISO SSD V 13 SSD NC 14 TSOP SCLK 1 SS ...
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PIN DESCRIPTION PIN NAME PDIP/SOIC TSOP SCLK MOSI 3 MISO 12 SSD SSA 9, 15, 23 MIC+ / MIC ANAOUT+ / ...
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PIN NAME PDIP/SOIC TSOP ACAP 13 20 SP CCA CCD 27 ANA AUX AUX OUT 20 ...
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PIN NAME PDIP/SOIC TSOP RAC 24 25 INT XCLK 26 3 Row Address Clock: RAC is an open drain output pin that marks the end of a row. At the 8 kHz sampling frequency, the duration of this period is ...
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FUNCTIONAL DESCRIPTION 6 ETAILED ESCRIPTION 6.1.1 Speech/Sound Quality The ISD5008 ChipCorder product can be configured via software to operate at 4.0, 5.3, 6.4, or 8.0 kHz sampling frequency, allowing the user a choice of speech quality options. ...
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Memory Architecture The ISD5008 device contains a total of 1,920K Flash memory cells, which is organized as 1,200 rows of 1,600 cells each. The duration is counted according to the number of rows, while the row number is represented ...
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NALOG UNCTIONAL 6.2.1 Mic+, Mic- + μ 220 F Electret Microphone WM-54B Panasonic 6.2.2 ANA IN (Analog Input) μ 0 COUP ANA IN Input 1 f NOTE: = CUTOFF π ...
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TABLE 4: ANA IN AMPLIFIER GAIN SETTINGS (1) Setting 0TLP Input ( 1. .785 12 dB .555 15 dB .393 NOTES: 1. Gain from ANA Gain from ANA ...
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TABLE 5: AUXIN AMPLIFIER GAIN SETTINGS (1) Setting 0TLP Input ( .694 3 dB .491 6 dB .347 9 dB .245 NOTES: 1. Gain from AUX IN to ANA OUT 2. Gain from AUX IN to ...
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I F NTERNAL UNCTIONAL Microphone Microphone Microphone (300 mVp-p max) (300 mVp-p max) (300 mVp-p max) MIC+ MIC+ MIC+ MIC– MIC– MIC– AGCCAP AGCCAP AGCCAP VLS1 VLS0 ...
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FIGURE 7: ISD5008 CORE (LEFT HALF ...
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FIGURE 9: VOLUME CONTROL ANA IN ANA IN ANA IN VOL VOL VOL MUX MUX MUX SUM 2 SUM 2 SUM 2 SUM 1 SUM 1 SUM 1 Volume Volume Volume Control Control Control INP INP INP ( ) ( ...
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FIGURE 11: ANA OUT Output ...
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ERIAL ERIPHERAL NTERFACE The ISD5008 product operates from a SPI serial interface, which operates with the following protocol: The data transfer protocol assumes that the microcontroller’s SPI shift registers are clocked on the falling edge of ...
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Opcodes Instruction Opcode <8 bits> Address <16 bits> POWERUP 0110 0000 [2] LOADCFG0 01X0 0010 <D15-D0> LOADCFG1 01X0 0100 <D15-D0> SETPLAY 1110 0000 <A15-A0> PLAY 1111 0000 SETREC 1010 0000 <A15-A0> REC 1011 0000 SETMC 1110 1000 <A15-A0> MC ...
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Power-Up Sequence The ISD5008 will be ready for an operation after T The user needs to wait T before issuing an instruction. Below are suggested playback and record PUD examples for references. 6.4.3.1 Record Mode 1. Send POWERUP command. ...
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SPI Port The following diagram describes the SPI port and the control bits associated with it. Byte D10 D11 D12 D13 D14 D15 ...
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TABLE 8: CONFIGURATION REGISTER 0 D15 D14 D13 D12 D11 AIG1 AIG0 AIP AXG1 AXG0 D NOTE: See details on following pages TABLE 9: CONFIGURATION REGISTER 1 D15 D14 D13 D12 D11 VLS1 VLS0 VOL2 VOL1 VOL0 NOTE: See details ...
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Volume Control Power Bit Bit 0 (VLPD) SPEAKER and AUX OUT Bits 2,1 Control Bits (OPA1, OPA0) OUTPUT MUX Con trol Bits Bits 4,3 (OPS1, OPS0) ANA OUT Power Bit Bit 5 (AOPD) ANA OUT MUX Con trol Bits Bits ...
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AGC Power Control Bit Bit 0 (AGPD) LOW PASS FILTER Power Bit 1 Control Bit (FLPD) SAMPLE RATE and LOW PASS Bits 3,2 FILTER Control Bits (FLD1, FLD0) FILTER MUX Control bits Bit 4 (FLS0) SUM 2 SUMMING AMP Control ...
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ISD5008 and does not affect the internal settings of the device. The next time Configuration Register 1 is loaded, data will also transfer from the temporary register to the Configuration Register 0 and effect the ...
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D0 D0 LSB A0 Input Shift Register (Loaded to Row Counter only if IAB = 0) LSB OVF EOM MISO CFG1 CFG0 A15 C 0 A0-A15 Select Logic Row Counter P0-P15 Output Shift Register P0 ... - 27 - ISD5008 ...
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FIGURE 15: TypicalDigital Cellular Phone Integration Baseband Section Baseband Section Baseband Section Section Section Section DSP DSP DSP Codec Codec Codec Microcontroller Microcontroller Microcontroller MIC+ MIC+ MIC IN+ MIC IN+ MIC IN+ ANA OUT+ ...
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PERATIONAL ODES The ISD5008 can operate in many different modes. It’s flexibility allows the user to configure the chip such that almost any input can mixed with any other input and then be directed to any ...
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Microphone Microphone Microphone MIC+ MIC+ MIC+ MIC– MIC– MIC– Chip Set Chip Set Chip Set ANA IN ANA IN ANA IN To select this mode, the following control bits must be configured in the ISD5008 configuration registers. To set up ...
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AUX output stage. The status of the rest of the functions in the ISD5008 chip must be defined before the con figuration registers settings are ...
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Call Record The call record mode adds the ability to record the incoming phone call. In most applications, the ISD 5008 would first be set up for Feed Through Mode as described above. When the user wishes to record ...
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Memo Record The Memo Record mode sets the chip up to record from the local microphone into the chip’s Multilevel Sto rage Array. A connected cellular telephone or cordless phone chip set may remain powered down and is not ...
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Memo and Call Playback This mode sets the chip up for local playb the MULTILEVEL STORAGE ARRAY to the FILTER MUX, then to the LOW PASS FILTER stage. From there the audio path goes through the SUM2 SUMMING amplifier ...
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To set up the chip for Memo or Ca CFG0=0010 0100 0010 0010 (hex 2422). CFG1=0101 1001 1101 0001 (hex 59D1). Only those portions necessary for this mode are powered up. ll Playback, the configuration registers are set up as ...
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TIMING DIAGRAMS SS BYTE 1 SCLK LSB MOSI A10 A11 A12 A13 A14 A15 LSB OVF EOM MISO FIGURE 17: 24-BIT SPI COMMAND FORMAT SS ...
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SS SCLK MOSI Play/R ecord MISO Data ANA IN ANA OUT FIGURE 19: PLAYBACK/RECORD AND STO SS SCLK LSB A8 A9 MOSI LSB OVF EOM MISO FIGURE 20: 8-Bit SPI Command Format A10 ...
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ABSOLUTE MAXIMUM TABLE 10: ABSOLUTE MAXIMUM RATINGS (PACKAGED PARTS) CONDITIONS J unction temperature S torage temperature range V oltage applied to any pin Voltage applied to MOSI, SCLK, INT , RAC and SS pins (Input current limited to ±20mA) ...
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O C PERATING ONDITIONS TABLE 12: O Commercial operat ing temperatu Extended operating tem Industrial operating tem [1] Supply voltage ( [2] Ground voltage ( TABLE 13: OPERATING CONDITIONS (DIE) Commercial operating temperature range ...
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ELECTRICAL CHAR 9 ENERAL ARAMETERS PARAMETERS SYMBOLS Input Low Voltage V IL Input High Voltage V IH Output Low Voltage RAC, INT Output Low OL1 Voltage O utput High Voltage perating ...
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T P IMING ARAM ETERS CHARACTERISTICS Sampling Frequency F Filter Pass Band F 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sample rate) Record Duration T 8.0 kHz (sample rate) 6.4 kHz ...
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RAC Clock Period T 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sampl e rate) RAC Low Time T 8.0 kHz (sample rate ) 6.4 kHz (sample rate) 5.3 kHz ...
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MIC+/- Gain Tracking A MIC (GT) Microphone input R MIC resistance Microphone AGC A AGC Amplifier Range (9) ANA IN ANA IN Input Voltage V ANA IN ANA IN (0TLP) Input V ANA Voltage (0TLP) Gain from ANA IN to ...
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Speaker Output DC Offset V SPDCO ANA IN to SP+/- Idle ICN ANA Channel Noise IN/(SP+/-) SP+/- to ANA OUT Cross (SP+/-) Talk ANA OUT Power Supply Rejection PSRR Ratio Frequency Response F R (300-3400 H z) ...
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ANA OUT to SP+/- Cross Talk OUT/(SP+/-) ANA OUT to AUX OUT Cross Talk OUT/AUX OUT (9) AUX OUT AUX OUT – Maximum V AUX OUT Output Swing Minimum Load Impedence R L Maximum ...
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Playback and Record Dura tion can vary as much as –6/+4 percent over the industrial temperature and voltage ranges. For greater stability and record durations are accurate within ±1% for 5.3kHz, and ±5% rates at room temperature. 7. Filter ...
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SPI AC P ARAMETERS CHARACTERISTIC SS Setup Time SS Hold Time Data in Setup Time Data in Hold Time Output Delay Output Delay to hiZ SS HIGH SCLK High Time SCLK Low Time CLK Frequency Notes: 1. Typical ...
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TYPICAL APPLICATION CIRCUIT To C μ SPI In terface & Ad dress S tting 1.5K Ω 0.1 F μ 1.5K Ω 220 μ F Electret 0.1 F μ microphone 1.5K Ω 4.7 F μ FIGURE 21: ...
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PACKAGE DRAWING AND DIMENSIONS 1 1.1 28 13.4 EAD EAD ...
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P EAD MIL LASTIC INCHES Min A 1.445 1.450 B1 0.150 B2 0.065 0.070 C1 0.600 C2 0.530 0.540 D D1 0.015 E 0.125 F 0.015 0.018 G 0.055 0.060 H 0.100 J 0.008 0.010 S 0.070 ...
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M P EAD IL LASTIC INCHES ...
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ORDERING INFORMA Product Series : IS D5008 Series ( minut es duration) Package Type P = Plastic Dual Inline Package (PDIP) Package S = Small Outline Integrated Circuit (SOIC) Package E = Thin Small Outline Package ...
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VERSION HISTORY VERSION DATE 0 Before 2004 1.0 April, 2004 1.1 Feb, 2008 DESCRIPTION Initial issue • Reformat the document. • Add application diagram. • Revise die info. • Revise ordering information. • Update Opcode • Update power-up ...
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The contents of this document are provided only as a guide for the applications of Nuvoton products. Nuvoton makes no representation or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right ...