ATV750-25PC ATMEL Corporation, ATV750-25PC Datasheet
ATV750-25PC
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ATV750-25PC Summary of contents
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... Increased product terms, sum terms, and flip-flops translate into more usable gates. Each of the ATV750(L)’s twenty-two logic pins can be used as an input. Ten of these can be used as input, output, or bi-directional I/O pins. All twenty flip-flops can be fed back into the array independently. This flexibility allows burying all of the sum terms and flip-flops ...
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... The ATV750(L) has more flip-flops available than other PLDs in this density range. Complex state machines are easily implemented. Product terms are available providing asynchronous resets, flip-flop clocks, and output enables. One reset and Absolute Maximum Ratings Temperature Under Bias ............................... -55° 125°C Storage Temperature .................................... -65° ...
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... Outputs Open ATV750L Ind.,Mil 0.5V OUT Com.,Ind Mil MIN mA, Com -100 MIN ATV750/750L-25 0°C - 70°C -40°C - 85°C -55°C - 125°C 10% 5V 10% Min Typ Max 10 10 120 140 1.0 12 1.0 15 -120 -0.6 0.8 2 0.75 0.5 0.5 1 0.3 CC 2.4 Units ...
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... AC Waveforms Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified. ATV750/L 4 ...
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... Clock Width W F Maximum Frequency MAX t Asynchronous Reset Width AW t Asynchronous Reset Recovery Time AR t Asynchronous Reset to Registered Output Reset AP t Setup Time, Synchronous Preset SP Input Test Waveforms and Measurement Levels < (10 ATV750-20 ATV750/750L-25 Min Max Min Output Test Loads ...
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... Functional Logic Diagram ATV750, Upper Half ATV750/L 6 ...
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... Functional Logic Diagram ATV750, Lower Half 7 ...
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... Power-Up Reset The registers in the ATV750(L) are designed to reset dur- ing power up point delayed slightly from V 3.8V, all registers will be reset to the low state. The output state will depend on the polarity of the output buffer. This feature is critical for state machine initialization. How- ...
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... Each register has its own clock and reset product terms, as well as its own SUM term. • Independent I/O Pin and Feedback Paths - Each I/O pin on the ATV750(L) has a dedicated input path. Each of the 20 registers has individual feedback terms into the array. This feature, combined with individual product terms for each I/O's output enable, facilitates designs using bi-directional I/O buses ...
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... ATV750/L 10 ...
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... Ordering Code ATV750-20JC ATV750-20PC ATV750-20SC ATV750-20JI ATV750-20PI ATV750-20SI ATV750-20DM ATV750-20GM ATV750-20LM ATV750-20NM ATV750-20DM/883 ATV750-20GM/883 ATV750-20LM/883 ATV750-20NM/883 ATV750-25JC ATV750-25PC ATV750-25SC ATV750-25JI ATV750-25PI ATV750-25SI ATV750-25DM ATV750-25GM ATV750-25LM ATV750-25NM ATV750-25DM/883 ATV750-25GM/883 ATV750-25LM/883 ATV750-25NM/883 5962-88726 04 LA 5962-88726 04 3X 5962-94524 03 MLA 5962-94524 03 M3X 5962-88726 03 LA ...
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... Wide, Plastic Gull Wing Small Outline OTP (SOIC) ATV750/L 12 Ordering Code ATV750L-25JC ATV750L-25PC ATV750L-25SC ATV750L-25JI ATV750L-25PI ATV750L-25SI ATV750L-25DM ATV750L-25GM ATV750L-25LM ATV750L-25NM ATV750L-25DM/883 ATV750L-25GM/883 ATV750L-25LM/883 ATV750L-25NM/883 5962-88726 07 LX 5962-88726 07 3X 5962-94524 05 MLA 5962-94524 05 M3X Package Type Package Operation Range 28J ...
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Packaging Information 24DW3, 24-Lead, 0.300" Wide, Windowed, Ceramic Dual In-line Package (Cerdip) Dimensions in Inches and (Millimeters) 28J, 28-Lead, Plastic J-Leaded Chip Carrier OTP (PLCC) Dimensions in Inches and (Millimeters) .045(1.14) X 30° - 45° .045(1.14) X 45° PIN NO. ...
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... PIN 1 ID .050(1.27) BSC .616(15.6) .598(15.2) .012(.305) .003(.076) .050(1.27) 0 REF .015(.381) 8 ATV750/L 14 24P3, 24-Lead, 0.300" Wide, Plastic Dual Inline Package OTP (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 AF .299(7.60) .420(10.7) .291(7.39) .393(9.98) .105(2.67) .092(2.34) ...