AT24C64 ATMEL Corporation, AT24C64 Datasheet

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AT24C64

Manufacturer Part Number
AT24C64
Description
Manufacturer
ATMEL Corporation
Datasheet

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Features
Description
The AT24C32/64 provides 32,768/65,536 bits of serial electrically erasable and pro-
grammable read only memory (EEPROM) organized as 4096/8192 words of 8 bits
each. The device’s cascadable feature allows up to 8 devices to share a common 2-
wire bus. The device is optimized for use in many industrial and commercial applica-
tions where low power and low voltage operation are essential. The AT24C32/64 is
available in space saving 8-pin JEDEC PDIP, 8-pin JEDEC SOIC, 8-pin EIAJ SOIC,
and 8-pin TSSOP (AT24C64) packages and is accessed via a 2-wire serial interface.
In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V)
versions.
Pin Configurations
Pin Name
A0 - A2
SDA
SCL
WP
Low-Voltage and Standard-Voltage Operation
Low-Power Devices (I
Internally Organized 4096 x 8, 8192 x 8
2-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Clock Rate
Write Protect Pin for Hardware Data Protection
32-Byte Page Write Mode (Partial Page Writes Allowed)
Self-Timed Write Cycle (10 ms max)
High Reliability
Automotive Grade and Extended Temperature Devices Available
8-Pin JEDEC PDIP, 8-Pin JEDEC SOIC, 8-Pin EIAJ SOIC,
and 8-pin TSSOP Packages
– 2.7 (V
– 1.8 (V
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
GND
A0
A1
A2
CC
CC
8-Pin PDIP
1
2
3
4
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
= 2.7V to 5.5V)
= 1.8V to 5.5V)
8
7
6
5
SB
VCC
WP
SCL
SDA
= 2 µA at 5.5V) Available
GND
GND
A0
A1
A2
A0
A1
A2
8-Pin TSSOP
1
2
3
4
1
2
3
4
8-Pin SOIC
8
7
6
5
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
2-Wire
Serial EEPROM
32K (4096 x 8)
64K (8192 x 8)
AT24C32
AT24C64
2-Wire, 32K
Serial E
Rev. 0336K–SEEPR–7/03
2
PROM
1

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AT24C64 Summary of contents

Page 1

... The AT24C32/64 is available in space saving 8-pin JEDEC PDIP, 8-pin JEDEC SOIC, 8-pin EIAJ SOIC, and 8-pin TSSOP (AT24C64) packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions ...

Page 2

Absolute Maximum Ratings* Operating Temperature.................................. - +125 C Storage Temperature ..................................... - +150 C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Block ...

Page 3

Pin Description Memory Organization 0336K–SEEPR–7/03 SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bidirectional for ...

Page 4

Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance ( Note: 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable ...

Page 5

AC Characteristics Applicable over recommended operating range from T pF (unless otherwise noted). Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High HIGH t Noise Suppression Time I t Clock Low ...

Page 6

Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter- nal device. Data on the SDA pin may change only during SCL low time periods (refer to Data Validity timing diagram). Data changes during ...

Page 7

Bus Timing SCL: Serial Clock, SDA: Serial Data I/O Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a valid stop condition of ...

Page 8

Data Validity Start and Stop Definition Output Acknowledge AT24C32/64 8 0336K–SEEPR–7/03 ...

Page 9

Device Addressing Write Operations 0336K–SEEPR–7/03 The 32K/64K EEPROM requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (refer to Figure 1). The device address word consists of a mandatory ...

Page 10

Read Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: Operations current address read, random address read ...

Page 11

Figure 1. Device Address Figure 2. Byte Write Figure 3. Page Write Note DON’T CARE bits 2. † = DON’T CARE bits for the 32K 0336K–SEEPR–7/03 AT24C32/64 11 ...

Page 12

Figure 4. Current Address Read Figure 5. Random Read Note DON’T CARE bits Figure 6. Sequential Read AT24C32/64 12 0336K–SEEPR–7/03 ...

Page 13

AT24C32 Ordering Information Ordering Code AT24C32-10PI-2.7 AT24C32N-10SI-2.7 AT24C32W-10SI-2.7 AT24C32-10PI-1.8 AT24C32N-10SI-1.8 AT24C32W-10SI-1.8 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. 8P3 8-lead, 0.300” Wide, Plastic Dual ...

Page 14

... AT24C64 Ordering Information Ordering Code AT24C64-10PI-2.7 AT24C64N-10SI-2.7 AT24C64W-10SI-2.7 AT24C64-10TI-2.7 AT24C64-10PI-1.8 AT24C64N-10SI-1.8 AT24C64W-10SI-1.8 AT24C64-10TI-1.8 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. 8P3 8-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150” Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200” ...

Page 15

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

Page 16

JEDEC SOIC 3 2 Top View e D Side View End View Note: This drawing is for general information only. Refer to JEDEC Drawing MS-012 for proper dimensions, tolerances, datums, etc. 2325 Orchard Parkway San ...

Page 17

EIAJ SOIC 1 N Top View Side View End View Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper ...

Page 18

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 19

... Fax: (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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