GS-R4840NV STMicroelectronics, GS-R4840NV Datasheet - Page 2

• Manufacturer Part Number: GS-R4840NV
• Manufacturer: STMicroelectronics

CONNECTION DIAGRAM AND MECHANICAL DATA
PIN DESCRIPTION
Note: Case internally connected to Ground.
2/3
GS-R4840NV
Package F. Dimensions in mm. (inches)
Pin
10
12
13
14
15
11
1
2
3
4
5
6
7
8
9
-Vin
Inhibit/
Enable
GND IN
+5V IN
DB0
DB1
DB2
DB3
DB4
DB5
CS
WR
-Vout
FAULT
GND OUT
Function
Negative input voltage.
Remote Inhibit/Enable logicall y compatible with CMOS or open collector TTL. The
converter is OFF (Inhibit) when this pin is unconnected or the voltage applied is in the
range of 2 to 5V (referred to GND). The converter is ON (Enable) for a control voltage in
the range of 0 to 0.8V maximum.
Return for input voltage source and +5V logic supply voltage. Internally connected to pin
15.
+5V logic supply voltage. Maximum voltage must not exceed 7V.
Data bit 0 (LSB).
Data bit 1.
Data bit 2.
Data bit 3.
Data bit 4.
Data bit 5 (MSB).
Chip select. An active low input control which is the device enable input terminal.
Write control. An active low control which enables the microprocessor to write data to the
DAC.
Negative output voltage.
FAULT indication output (referred to GND). The FAULT signal is high (TTL compatible
level) when:
Return for output voltage source. Internally connected to pin 3.
- the INHIBIT is ON (high)
- an output overload is present (Vo < 18V typ.)
- an overtemperature is present
- an overvoltage is present (Vo > Vo+5%)
Description