AT32UC3C0256C Atmel Corporation, AT32UC3C0256C Datasheet - Page 907
AT32UC3C0256C
Manufacturer Part Number
AT32UC3C0256C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0256C
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
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- AT32UC3C0128C PDF datasheet #4
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32.7.1.2
Register Name:
Access Type:
Offset:
Reset Value:
• CLKUSABLE: Generic Clock Usable
• SPEED: Speed Status
• VBUS: VBUS Level
• ID: USB_ID Pin state
• VBUSRQ: VBUS Request
32117C–AVR-08/11
STOI
31
23
15
7
-
-
-
This bit is cleared when the USB generic clock is not usable.
This bit is set when the USB generic clock (that should be 48 Mhz) is usable.
This field is set according to the controller speed mode.
SPEED
This bit is cleared when the VBUS line level is low, even if USBE is zero.
This bit is set when the VBUS line level is high, even if USBE is zero.
This bit can be used in device mode to monitor the USB bus connection state of the application.
This bit is cleared when the USB_ID level is low, even if USBE is zero.
This bit is set when the USB_ID level is high, even if USBE is zero.
0: The USB_VBOF output pin is driven low to disable the VBUS power supply generation.
1: The USB_VBOF output pin is driven high to enable the VBUS power supply generation.
This bit is cleared when USBSTACLR.VBUSRQC is written to one or when a VBUS error occurs while VBUSHWC is zero.
This bit is set when USBSTASET.VBUSRQS is written to one.
This bit should only be used in host mode.
00
01
10
11
General Status Register
CLKUSABLE
HNPERRI
30
22
14
6
-
-
USBSTA
Read-Only
0x0804
0x00000000
Speed Status
full-speed mode
Reserved
low-speed mode
Reserved
ROLEEXI
29
21
13
5
-
-
SPEED
BCERRI
28
20
12
4
-
-
VBERRI
VBUS
27
19
11
3
-
-
SRPI
26
18
10
ID
2
-
-
VBUSRQ
VBUSTI
25
17
9
1
-
-
AT32UC3C
IDTI
24
16
8
0
-
-
-
907
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