AT86RF232 Atmel Corporation, AT86RF232 Datasheet - Page 56

• Manufacturer Part Number: AT86RF232
• Manufacturer: Atmel Corporation

Specifications of AT86RF232

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -100
• Receive Current Consumption (ma): 11.8
• Transmit Current Consumption (ma): 13.8
• Link Budget (dbm): 103

7.2.3.5 RX_AACK Slotted Operation – Slotted Acknowledgement
Figure 7-12. Example Timing of an RX_AACK Transaction for Slotted Operation.
56
Frame Type
TRX_STATE
RX/TX
IRQ
Typ. Processing Delay
SLP_TR
AT86RF232
RX_AACK_ON
0
64
acknowledgement frames not to be announced, which would otherwise always pass the
filter, regardless of whether they are intended for this device or not.
For backward compatibility to IEEE 802.15.4-2003 third level filter rule two (Frame
Version) can be disabled by register bits AACK_FVN_MODE (register 0x2E,
CSMA_SEED_1).
Frame filtering is available in Extended and Basic Operating Mode, refer to
a frame passing the frame filtering generates an IRQ_5 (AMI), if enabled.
Atmel AT86RF232
IEEE 802.15.4-2006, Section 7.5.6.4.2, in conjunction with the microcontroller.
In RX_AACK mode with register bit SLOTTED_OPERATION (register 0x2C,
XAH_CTRL_0) set, the transmission of an acknowledgement frame has to be controlled
by the microcontroller. If an ACK frame has to be transmitted, the radio transceiver
expects a rising edge on pin 11 (SLP_TR) to actually start the transmission. This
waiting state is signaled two symbol periods after the reception of the last symbol of a
data or MAC command frame by register bits TRAC_STATUS (register 0x02,
XAH_CTRL_0), which are set to SUCCESS_WAIT_FOR_ACK in that case. In networks
using slotted operation the start of the acknowledgment frame, and thus the exact
timing, must be provided by the microcontroller.
A timing example of an RX_AACK transaction with register bit SLOTTED_OPERATION
(register 0x2C, XAH_CTRL_0) set is shown in
frame is ready to be transmitted two symbol times after the reception of the last symbol
of a data or MAC command frame. The transmission of the acknowledgement frame is
initiated by the microcontroller with the rising edge of pin 11 (SLP_TR) and starts
t
TR10
Notes:
SFD
RX
RX
Data Frame (Length = 10, ACK=1)
= 16µs later. The interrupt latency t
waiting period signalled by register bits TRAC_STATUS
1.
2.
Filter rule one is affected by register bits AACK_FLTR_RES_FT and
AACK_UPLD_RES_FT,
Filter rule two is affected by register bits AACK_FVN_MODE,
supports
(2 symbols)
TRX_END
t
32 μs
IRQ
512
BUSY_RX_AACK
slotted
t
TR10
Section
IRQ
SLP_TR
704
is specified in
acknowledgement
7.2.7.
ACK transmission initated by microcontroller
Figure
ACK Frame
TX
TX
Section
7-12. The acknowledgement
operation,
12.4.
1026
8321A–MCU Wireless–10/11
RX_AACK_ON
Section
RX
RX
time [μs]
Section
7.2.7.
refer
7.1,
to