AT89LP51ED2 Atmel Corporation, AT89LP51ED2 Datasheet - Page 104
AT89LP51ED2
Manufacturer Part Number
AT89LP51ED2
Description
Manufacturer
Atmel Corporation
Specifications of AT89LP51ED2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
42
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
7
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
2.25
Eeprom (bytes)
4096
Self Program Memory
API
Operating Voltage (vcc)
2.4 to 5.5
Timers
4
Isp
SPI/OCD/UART
Watchdog
Yes
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15.5
104
High Speed Output Mode
AT89LP51RD2/ED2/ID2 Preliminary
In this mode the CEX output (on port 1) associated with the PCA module will toggle each time a
match occurs between the PCA counter and the modules capture registers as shown in
15-6. To activate this mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR must
be set (See
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
Figure 15-5. PCA High Speed Output Mode
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, other-
wise an unwanted match could happen. Once ECOM is set, writing CCAPnL will clear ECOM so
that an unwanted match doesn’t occur while modifying the compare value. Writing to CCAPnH
will set ECOM. For this reason, user software should write CCAPnL first, and then CCAPnH. Of
course, the ECOM bit can still be controlled by accessing to CCAPMn register.
An example of a High Speed Output waveform is shown in
output can be controlled by reloading the PCA Timer in software and/or changing the compare
values multiple times per timeout period.
Figure 15-6. High Speed Output Waveform
{CCAPnH,CCAPnL}
{CH,CL} = FFFFH
{CH,CL} = 0000H
CCAPnL CCAPnH
Figure
CL
CEXn
CCAPnH
Write to
15-5).
CH
1
ECOMn
=
0
CCAPMn.3
CCAPMn.2
TOGn
MATn
Write to
CCAPnL
TOGn = 1, ECOMn = 1
CCFn
CCAPMn.0
ECCFn
Figure
Module n
15-6. The frequency of the
Interrupt
CEXn
3714A–MICRO–7/11
Figure
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