ATmega168A Atmel Corporation, ATmega168A Datasheet - Page 48

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ATmega168A

Manufacturer Part Number
ATmega168A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega168A

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11. System Control and Reset
11.1
11.2
8271D–AVR–05/11
Resetting the AVR
Reset Sources
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. For ATmega168A/168PA/328/328P the instruction placed at the Reset
Vector must be a JMP – Absolute Jump – instruction to the reset handling routine. For the
ATmega 48A/48PA and ATmega88A/88PA, the instruction placed at the Reset Vector must be
an RJMP – Relative Jump – instruction to the reset handling routine. If the program never
enables an interrupt source, the Interrupt Vectors are not used, and regular program code can
be placed at these locations. This is also the case if the Reset Vector is in the Application sec-
t i o n w h i l e t h e I n t e r r u p t V e c t o r s a r e i n t h e B o o t s e c t i o n o r v i c e v e r s a
(ATmega88A/88PA/168A/168PA/328/328P only). The circuit diagram in
shows the reset logic.
circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATmega48A/PA/88A/PA/168A/PA/328/P has four sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer than
• Watchdog System Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown-out Reset. The MCU is reset when the supply voltage V
threshold (V
the minimum pulse length.
Watchdog System Reset mode is enabled.
threshold (V
POT
BOT
).
) and the Brown-out Detector is enabled.
ATmega48A/PA/88A/PA/168A/PA/328/P
Table 29-12 on page 324
defines the electrical parameters of the reset
”Clock Sources” on page
CC
is below the Brown-out Reset
Figure 11-1 on page 49
28.
48