ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 16
ATxmega128B1
Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128B1
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128B1-AU
Manufacturer:
TI
Quantity:
90
Company:
Part Number:
ATxmega128B1-U
Manufacturer:
FUJITSU
Quantity:
632
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3.14.7
3.14.8
8291A–AVR–10/11
SPL – Stack Pointer Register Low
SPH – Stack Pointer Register High
EXALL/EIJMP are used, and it will not be used if CALL and IJMP commands are used. For jump
or call to addresses below 128KB, this register is not used. This register is not available if the
program memory in the device is less than 128KB.
• Bit 7:0 – EIND[7:0]: Extended Indirect Address bits
These bits hold the MSB of the 24-bit address created by EIND and the 16-bit Z-register. Only
the number of bits required to access the available program memory is implemented for each
device. Unused bits will always read as zero.
The SPH and SPL register pair represent the 16-bit SP value. The SP holds the stack pointer
that points to the top of the stack. After reset, the stack pointer points to the highest internal
SRAM address. To prevent corruption when updating the stack pointer from software, a write to
SPL will automatically disable interrupts for the next four instructions or until the next I/O mem-
ory write.
Only the number of bits required to address the available data memory, including external mem-
ory, up to 64KB is implemented for each device. Unused bits will always read as zero.
Note:
• Bit 7:0 – SP[7:0]: Stack Pointer Register Low byte
These bits hold the LSB of the 16-bit stack pointer (SP).
Note:
• Bit 7:0 – SP[15:8]: Stack Pointer Register High byte
These bits hold the MSB of the 16-bit stack pointer (SP).
Bit
+0x0D
Read/Write
Initial Value
Bit
+0x0E
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
(1)
1. Refer to specific device datasheets for exact initial values.
1. Refer to specific device datasheets for exact initial values.
(1)
R/W
R/W
R/W
0/1
0/1
7
0
7
7
R/W
R/W
R/W
0/1
0/1
6
0
6
6
R/W
R/W
R/W
0/1
0/1
5
5
5
0
R/W
R/W
R/W
0/1
0/1
4
4
4
0
SP[15:8]
EIND[7:0]
SP[7:0]
R/W
R/W
0/1
R/W
0/1
3
3
3
0
Atmel AVR XMEGA B
R/W
R/W
0/1
R/W
0/1
2
2
2
0
R/W
0/1
R/W
0/1
1
R/W
1
1
0
R/W
0/1
R/W
0/1
0
R/W
0
0
0
SPH
EIND
SPL
16
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