ATxmega64D4 Atmel Corporation, ATxmega64D4 Datasheet - Page 239
ATxmega64D4
Manufacturer Part Number
ATxmega64D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64D4
Flash (kbytes)
64 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATxmega64D4-AU
Manufacturer:
AT
Quantity:
20 000
Company:
Part Number:
ATxmega64D4-H
Manufacturer:
ATMEL
Quantity:
5
Company:
Part Number:
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Manufacturer:
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Quantity:
86
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20.12.9
20.12.10 CH0RESH - ADC Channel Result register High
20.12.10.1
20.12.10.2
20.12.10.3
8210B–AVR–04/10
CALH - ADC Calibration value registers
12-bit mode, left adjusted
12-bit mode, right adjusted
8-bit mode
• Bits 7:4 - Reserved
These bits are reserved and will always read as zero. For compatibility reasons always write
these bits to zero when this register is written.
• Bits 3:0 - CAL[11:8]: ADC Calibration value
This is the 4 MSB of the 12-bit CAL value.
The CH0RESL and CH0RESH register pair represents the 16-bit value CH0RES. For details on
reading 16-bit register refer to
• Bits 7:0 - CHRES[11:4]: ADC Channel Result, high byte
These are the 8 MSB of the 12-bit ADC result.
• Bits 7:4 - Reserved
These bits will in practice be the extension of the sign bit CHRES11 when ADC works in differen-
tial mode and set to zero when ADC works in signed mode.
• Bits 3:0 - CHRES[11:8]: ADC Channel Result, high byte
These are the 4 MSB of the 12-bit ADC result.
• Bits 7:0 - Reserved
These bits will in practice be the extension of the sign bit CHRES7 when ADC works in signed
mode and set to zero when ADC works in single-ended mode.
12-bit, left
12-bit, right
8-bit
Bit
+0x0D
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R
7
–
0
R
6
–
0
R
7
–
–
0
”Accessing 16-bits Registers” on page
R
5
–
0
R
6
–
–
0
R
4
–
0
R
5
–
–
0
R/W
3
0
R
4
–
–
0
CHRES[11:4]
R/W
2
0
R
3
–
0
CAL[11:8]
12.
R/W
1
0
R
2
–
0
CHRES[11:8]
XMEGA D
R/W
0
0
R
1
–
0
CAL
R
0
–
0
239
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