AD9410 Analog Devices, AD9410 Datasheet

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AD9410

Manufacturer Part Number
AD9410
Description
10-Bit, 210 MSPS ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD9410

Resolution (bits)
10bit
# Chan
1
Sample Rate
210MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
1.5 V p-p
Adc Architecture
Pipelined
Pkg Type
QFP

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FEATURES
SNR = 54 dB with 99 MHz analog input
500 MHz analog bandwidth
On-chip reference and track and hold
1.5 V p-p differential analog input range
5.0 V and 3.3 V supply operation
3.3 V CMOS/TTL outputs
Power: 2.1 W typical at 210 MSPS
Demultiplexed outputs each at 105 MSPS
Output data format option
Data sync input and data clock output provided
Interleaved or parallel data output option
APPLICATIONS
Communications and radars
Local multipoint distribution services (LMDS)
High-end imaging systems and projectors
Cable reverse paths
Point-to-point radio links
GENERAL DESCRIPTION
The AD9410 is a 10-bit monolithic sampling analog-to-digital
converter (ADC) with an on-chip track-and-hold circuit and is
optimized for high speed conversion and ease of use. The product
operates at a 210 MSPS conversion rate, with outstanding
dynamic performance over its full operating range.
The ADC requires a 5.0 V and 3.3 V power supply and up to a
210 MHz differential clock input for full performance operation.
No external reference or driver components are required for many
applications. The digital outputs are TTL-/CMOS-compatible and
separate output power supply pins also support interfacing with
3.3 V logic.
The clock input is differential and TTL-/CMOS-compatible.
The 10-bit digital outputs can be operated from 3.3 V (2.5 V to
3.6 V) supplies. Two output buses support demultiplexed data
up to 105 MSPS rates and binary or twos complement output
coding format is available. A data sync function is provided for
timing-dependent applications. An output clock simplifies
interfacing to external logic. The output data bus timing is
selectable for parallel or interleaved mode, allowing for
flexibility in latching output data.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
CLK+
Fabricated on an advanced BiCMOS process, the AD9410 is
available in an 80-lead thin quad flat package, exposed pad
specified over the industrial temperature range (−40°C to +85°C).
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
CLK–
A
A
DS
DS
IN
IN
High Resolution at High Speed—The architecture is spe-
cifically designed to support conversion up to 210 MSPS
with outstanding dynamic performance.
Demultiplexed Output—Output data is decimated by two
and provided on two data ports for ease of data transport.
Output Data Clock—The AD9410 provides an output data
clock synchronous with the output data, simplifying the
timing between data and other logic.
Data Synchronization—A DS input is provided to allow for
synchronization of two or more AD9410s in a system, or to
synchronize data to a specific output port in a single
AD9410 system.
SYNCHRONIZATION
FUNCTIONAL BLOCK DIAGRAM
TIMING AND
T/H
DFS
REF
REFERENCE
©2000–2007 Analog Devices, Inc. All rights reserved.
IN
REF
I/P
OUT
10-BIT
CORE
ADC
Figure 1.
AGND
10
210 MSPS ADC
DGND
AD9410
V
PORT
PORT
D
A
B
V
DD
10
10
V
AD9410
CC
www.analog.com
10-Bit,
OR
D
OR
D
DCO
DCO
A9
B9
A
B
–D
–D
A0
B0

Related parts for AD9410

AD9410 Summary of contents

Page 1

... Data Synchronization—A DS input is provided to allow for synchronization of two or more AD9410s in a system synchronize data to a specific output port in a single AD9410 system. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. ...

Page 2

... Changes to Figure 29...................................................................... 18 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 19 Pin Configuration and Function Descriptions..............................8 Terminology .................................................................................... 10 Equivalent Circuits..................................................................... 12 Typical Performance Characteristics ........................................... 13 Theory of Operation ...................................................................... 16 Using the AD9410 ...................................................................... 16 Analog Input ............................................................................... 16 Digital Outputs ........................................................................... 16 Clock Outputs (DCO, DCO ).................................................... 16 Voltage Reference ....................................................................... 17 Timing ......................................................................................... 17 Data Sync (DS) ........................................................................... 17 Outline Dimensions ....................................................................... 19 Ordering Guide .......................................................................... 19 10/00— ...

Page 3

... VI Full V Full VI 25°C V 25°C V 25°C V Full VI Full VI Full VI 25° typical pF. VDD LOAD Rev Page AD9410 = 25°C; unless otherwise noted. A Min Typ Max 10 Guaranteed −1.0 ±0.5 +1.25 −1.0 +1.5 −2.5 ±1.65 +2.5 −3.0 +3.0 −6.0 0 +6.0 130 ±768 3.0 −15 ...

Page 4

... AD9410 SWITCHING SPECIFICATIONS 5.0 V; 2.5 V external reference Table 2. Parameter SWITCHING PERFORMANCE Maximum Conversion Rate Minimum Conversion Rate Clock Pulse Width High Clock Pulse Width Low Aperture Delay Aperture Uncertainty (Jitter) Output Valid Time Output Propagation Delay, t ...

Page 5

... I −56 25°C I −55 25°C V 25°C I −58 25°C I −57 25°C V 25° 25° 25°C V 25°C V Rev Page AD9410 = 25°C; unless otherwise noted. A Typ Max Unit 8.8 Bits 8.6 Bits 8.4 Bits − ...

Page 6

... AD9410 SAMPLE N–1 SAMPLE SAMPLE N+1 SAMPLE N+2 SAMPLE N– CLK+ CLK– SDS HDS DS DS INTERLEAVED DATA OUT PORT A STATIC PORT B STATIC PARALLEL DATA OUT PORT A STATIC PORT B STATIC DCO STATIC DCO ...

Page 7

... Maximum Junction Temperature 1 Adequate dissipation of power from the AD9410 relies on all power and ground pins of the device being soldered directly to a copper plane on a PCB. In addition, the thermally enhanced package of the AD9410BSVZ has an exposed paddle on the bottom that must be soldered to a large copper plane, which, for convenience, can be the ground plane ...

Page 8

... PIN 1 IDENTIFIER AD9410 TOP VIEW 80-LEAD THIN QUAD FLAT PACKAGE (Not to Scale Figure 3. Pin Configuration Function Analog Ground Supply. (Regulate to within ±5%.) Internal Reference Output. Internal Reference Input. ...

Page 9

... Digital Data Output for Channel A (MSB = D Data Overrange for Channel A. Data Format Select. High = twos complement, and low = binary. Interleaved or Parallel Output Mode. Low = parallel mode, and high = interleaved mode. If tying high, use a current limiting series resistor (2.5 kΩ) to the 5 V supply. Rev Page AD9410 ...

Page 10

... AD9410 TERMINOLOGY Analog Bandwidth The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay The delay between the 50% point of the rising edge of the clock command and the instant at which the analog input is sampled. ...

Page 11

... Digital Outputs Twos Complement 01 1111 1111 01 1111 1111 · · 00 0000 0001 00 0000 0000 11 1111 1111 · · 10 0000 0000 10 0000 0000 Rev Page AD9410 · · · · 0 ...

Page 12

... AD9410 EQUIVALENT CIRCUITS V CC 1.5kΩ 2.25kΩ Figure 4. Equivalent Analog Input Circuit V CC VREF IN Figure 5. Equivalent Reference Input Circuit V CC 450Ω 450Ω 17kΩ CLK+ 100Ω 100Ω 8kΩ Figure 6. Equivalent Clock Input Circuit V DD DIGITAL OUTPUT Figure 7. Equivalent Digital Output Circuit 1.5kΩ ...

Page 13

... SNR 54.0 53.5 53.0 52.5 SINAD 52.0 51.5 51.0 50.5 50.0 100 120 140 160 180 200 SAMPLE RATE (MSPS) Figure 16. SNR/SINAD vs. Sample Rate SNR SINAD 0.5 1.0 1.5 2.0 2.5 3.0 PULSE WIDTH (ns) Figure 17. SNR/SINAD vs. Clock Positive Pulse Width (f = 210 MSPS MHz AD9410 200 250 220 240 = 70 MHz 3.5 4.0 ...

Page 14

... AD9410 0 ENCODE = 210MSPS –7dBFS IN IN SFDR = 62dBFS –20 –40 –60 –80 –100 –120 0 FREQUENCY (MHz) Figure 18. Two Tone Test 80.3 MHz 55.5 55.0 54.5 54.0 53.5 53.0 52.5 52.0 51.5 –40 – TEMPERATURE (°C) Figure 19. SNR/SINAD vs. Temperature, 210 MSPS – ...

Page 15

... TEMPERATURE (°C) Figure 24. VREF vs. Temperature OUT 5.1 4.9 4.7 4.5 4.3 4.1 3 –40 Rev Page AD9410 CPD – TEMPERATURE (°C) Figure 25 vs. Temperature PD V CPD ...

Page 16

... ADC output. For that reason, considerable care has been taken in the design of the clock input of the AD9410, and the user is advised to give commensurate thought to the clock source. To limit SNR degradation to less than 1 dB, a clock source with less than 1 ...

Page 17

... AD9410; these transients can detract from the dynamic performance of the converter. The minimum guaranteed conversion rate of the AD9410 is 100 MSPS. At internal clock rates below 100 MSPS, dynamic performance may degrade. Note that lower effective sampling rates can be obtained simply by sampling just one output port— ...

Page 18

... AGND 1 AGND REF 4 OUT REF 5 IN DNC AGND 8 AGND AD9410 AGND 12 AGND AGND 16 AGND 17 CLK CLK– 20 AGND J9X ...

Page 19

... Figure 30. 80-Lead Thin Quad Flat Package, Exposed Pad [TQFP_EP] (SV-80-4) Dimensions shown in millimeters Package Description 80-Lead Thin Quad Flat Package, Exposed Pad [TQFP_EP] Rev Page EXPOSED 9.50 SQ PAD BOTTOM VIEW (PINS UP 0.65 BSC 0.27 LEAD PITCH 0.22 0.17 AD9410 Option SV-80-4 ...

Page 20

... AD9410 NOTES ©2000–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01679-0-7/07(A) Rev Page ...

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