ADM1169 Analog Devices, ADM1169 Datasheet - Page 8

• Manufacturer Part Number: ADM1169
• Description: Super Sequencer and Monitor with Margining Control and Non-Volatile Fault Recording
• Manufacturer: Analog Devices

Specifications of ADM1169

• # Supplies Monitored: 8
• Volt Monitoring Accuracy: 1%
• # Output Drivers: 8
• Fet Drive/enable Output: Both
• Voltage Readback: 12-bit ADC
• Supply Adj/margining: 12-bit ADC+4 DACs
• Package: 32 ld LQFP,40 ld LFCSP

ADM1169
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
LQFP
N/A
1 to 4
5 to 7
8
9
10
11
12
13 to 16
17 to 24
25
26
27
28
29
30
2
Pin No.
LFCSP
1, 6, 15,
16, 21,
22, 37, 38
10
11
12
13
14
17 to 20
23 to 30
31
32
33
34
35
36
2 to 5
7 to 9
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
Figure 3. 32-Lead LQFP Pin Configuration
1
1
8
32
9
Mnemonic
NC
VX1 to VX4 (VXx)
VP1 to VP3 (VPx)
VH
AGND
REFGND
REFIN
REFOUT
DAC1 to DAC4
PDO8 to PDO1
PDOGND
VCCP
A0
A1
SCL
SDA
PIN 1
INDICATOR
(Not to Scale)
ADM1169
TOP VIEW
3
3
3
16
25
24
17
Description
No Connect.
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V
to 1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to these pins, the output of which connects to a supply
fault detector. These pins allow thresholds from 2.5 V to 6 V, from 1.25 V to 3 V, and from 0.573 V
to 1.375 V.
High Voltage Input to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a supply
fault detector. This pin allows thresholds from 6 V to 14.4 V and from 2.5 V to 6 V.
Ground Return for Input Attenuators.
Ground Return for On-Chip Reference Circuits.
Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage. The
on-board reference can be used by connecting the REFOUT pin to the REFIN pin. This is the normal
configuration.
2.048 V Reference Output. A reservoir capacitor must always be connected between this pin and
GND, even if the REFIN pin is driven by an external reference. A 10 μF capacitor is recommended
for this purpose.
Voltage Output DACs. These pins default to high impedance at power-up.
Programmable Output Drivers.
Ground Return for Output Drivers.
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this
pin and GND. A 10 μF capacitor is recommended for this purpose.
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.
SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
Rev. 0 | Page 8 of 36
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE LFCSP HAS AN EXPOSED PAD ON THE BOTTOM.
THIS PAD IS A NO CONNECT (NC). IF POSSIBLE, THIS
PAD SHOULD BE SOLDERED TO THE BOARD FOR
IMPROVED MECHANICAL STABILITY.
VX1
VX2
VX3
VX4
VP1
VP2
VP3
NC
NC
VH
Figure 4. 40-Lead LFCSP Pin Configuration
10
1
2
3
4
5
6
7
8
9
PIN 1
INDICATOR
(Not to Scale)
ADM1169
TOP VIEW
30
29
28
27
26
25
24
23
22
21
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
NC
NC