LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 103
LPC1850FET256
Manufacturer Part Number
LPC1850FET256
Description
The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1810FBD144.pdf
(157 pages)
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11. Dynamic characteristics
LPC1850_30_20_10
Preliminary data sheet
11.1 Wake-up times
11.2 External clock
Table 9.
T
[1]
[2]
Table 10.
T
[1]
[2]
Symbol Parameter
t
Symbol Parameter
f
T
t
t
wake
amb
amb
osc
CHCX
CLCX
Fig 22. External clock timing (with an amplitude of at least V
cy(clk)
Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply
voltages.
T
Parameters are valid over operating temperature range unless otherwise specified.
Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply
voltages.
=
=
cy(clk)
40
40
= 1/CCLK with CCLK = CPU clock frequency.
wake-up time from Sleep mode
oscillator frequency
clock cycle time
clock HIGH time
clock LOW time
Dynamic characteristic: Wake-up from Deep-sleep, Power-down, and Deep
power-down modes
Dynamic characteristic: external clock
C to +85
C to +85
All information provided in this document is subject to legal disclaimers.
C
C; V
Rev. 3.1 — 15 December 2011
Conditions
from Deep-sleep and
Power-down mode
from Deep power-down mode
after reset
DD(IO)
Conditions
over specified ranges.
t
CLCX
Min
1
40
T
T
cy(clk)
cy(clk)
32-bit ARM Cortex-M3 microcontroller
[1]
T
LPC1850/30/20/10
cy(clk)
0.4
0.4
[2]
t
CHCX
-
Min
3
T
12
-
cy(clk)
i(RMS)
Typ
-
-
-
-
= 200 mV)
Typ
5 T
51
250
250
[2]
[1]
Max
25
1000
T
T
002aag698
cy(clk)
© NXP B.V. 2011. All rights reserved.
cy(clk)
cy(clk)
0.6
0.6
Max
-
-
-
-
103 of 157
Unit
MHz
ns
ns
ns
Unit
ns
s
s
s
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