LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 123
LPC1850FET256
Manufacturer Part Number
LPC1850FET256
Description
The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1810FBD144.pdf
(157 pages)
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Table 26.
V
[1]
[2]
LPC1850_30_20_10
Preliminary data sheet
Symbol Parameter
E
E
E
E
C
R
t
s
DDA(3V3)
D
L(adj)
O
G
L
L
In the DAC CR register, bit BIAS = 0 (see the LPC18xx user manual).
Settling time is calculated within 1/2 LSB of the final value.
over specified ranges; T
differential linearity error
integral non-linearity
offset error
gain error
load capacitance
load resistance
settling time
DAC characteristics
Fig 36. ADC interface to pins
amb
R
s
Conditions
2.7 V V
2.2 V V
2.7 V V
2.2 V V
2.7 V V
2.2 V V
2.7 V V
2.2 V V
=
LPC18xx
< 1/((7 f
COMPARATOR
40
All information provided in this document is subject to legal disclaimers.
ADC
C to +85
DDA(3V3)
DDA(3V3)
DDA(3V3)
DDA(3V3)
DDA(3V3)
DDA(3V3)
DDA(3V3)
DDA(3V3)
clk(ADC)
Rev. 3.1 — 15 December 2011
C
C; unless otherwise specified
3.6 V
< 2.7 V
3.6 V
< 2.7 V
3.6 V
< 2.7 V
3.6 V
< 2.7 V
ia
) 2 k
C ia = 2 pF
V
SS
2.2 kΩ (multiplexed pin)
[1]
[1]
[1]
[1]
[1]
2 kΩ (analog pin)
Min
-
-
-
-
-
-
-
-
-
1
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
Typ
0.8
1.0
1.0
1.5
0.8
1.0
0.3
1.0
-
-
0.4
ADC0_n/ADC1_n
R s
Max
-
-
-
-
-
-
-
-
200
-
© NXP B.V. 2011. All rights reserved.
002aag697
R
V EXT
vsi
123 of 157
Unit
LSB
LSB
LSB
LSB
LSB
LSB
%
%
pF
k
s
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