PHD71NQ03LT NXP Semiconductors, PHD71NQ03LT Datasheet - Page 5

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology

PHD71NQ03LT

Manufacturer Part Number
PHD71NQ03LT
Description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
Manufacturer
NXP Semiconductors
Datasheet

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6. Characteristics
Table 6.
PHD71NQ03LT_2
Product data sheet
Symbol
Static characteristics
V
V
I
I
R
Dynamic characteristics
Q
Q
Q
C
C
C
t
t
t
t
Source-drain diode
V
t
Q
DSS
GSS
d(on)
r
d(off)
f
rr
(BR)DSS
GS(th)
SD
DSon
iss
oss
rss
G(tot)
GS
GD
r
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
drain leakage current
gate leakage current
drain-source on-state
resistance
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
source-drain voltage
reverse recovery time
recovered charge
Conditions
I
I
I
I
I
V
V
V
V
V
and
V
V
and
I
see
V
see
V
R
I
I
V
D
D
D
D
D
D
S
S
DS
DS
GS
GS
GS
GS
GS
DS
DS
DS
G(ext)
= 250 µA; V
= 250 µA; V
= 1 mA; V
= 1 mA; V
= 1 mA; V
= 50 A; V
= 25 A; V
= 10 A; dI
All information provided in this document is subject to legal disclaimers.
Figure 11
Figure 12
= 30 V; V
= 30 V; V
10
10
= 25 V; V
= 15 V; R
= 25 V; T
= 20 V; V
= -20 V; V
= 5 V; I
= 10 V; I
= 5 V; I
= 5.6 Ω; T
D
D
GS
DS
S
DS
DS
DS
Rev. 02 — 9 March 2010
D
/dt = -100 A/µs; V
= 25 A; T
= 25 A; T
j
GS
GS
DS
GS
L
GS
GS
DS
= 25 °C
= 25 A; T
= 15 V; V
= 0 V; T
= V
= V
= V
= 0.6 Ω; V
= 0 V; T
= 0 V; T
= 0 V; T
= 0 V; f = 1 MHz; T
j
= 0 V; T
= 0 V; T
= 0 V; T
= 25 °C; I
GS
GS
GS
; T
; T
; T
j
j
j
= 175 °C; see
= 25 °C; see
= 25 °C; see
j
j
j
j
GS
j
j
j
= 175 °C; see
= -55 °C; see
= 25 °C; see
= 25 °C; see
j
j
j
GS
= 25 °C
= 175 °C
= 25 °C
= -55 °C
= 25 °C
= 25 °C
= 5 V; T
D
= 4.5 V;
= 25 A
GS
= 0 V;
j
j
= 25 °C;
= 25 °C;
Figure 13
Figure 9
Figure 8
Figure 9
Figure 9
Figure 8
Figure 8
N-channel TrenchMOS logic level FET
PHD71NQ03LT
Min
27
30
0.6
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
-
-
-
-
1.9
0.05
-
10
10
21.6
8
12
13.2
5.3
1220
330
140
15
150
18
0.9
29
4.6
13.5
20
© NXP B.V. 2010. All rights reserved.
Max
-
-
-
2.9
2.5
1
500
100
100
27.4
10
15.2
-
-
-
-
-
-
-
-
-
-
1.2
-
-
µA
nC
pF
ns
Unit
V
V
V
V
V
µA
nA
nA
mΩ
mΩ
mΩ
nC
nC
pF
pF
ns
ns
ns
V
ns
nC
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