STM32F205ZG STMicroelectronics, STM32F205ZG Datasheet - Page 137

• Manufacturer Part Number: STM32F205ZG
• Description: High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator
• Manufacturer: STMicroelectronics

Specifications of STM32F205ZG

• 10/100 Ethernet Mac With Dedicated Dma: supports IEEE 1588v2 hardware, MII/RMII

STM32F205xx, STM32F207xx
Table 78.
1. C
2. Based on characterization, not tested in production.
t
d(NCE4_1-NIOWR)
t
t
t
h(NCEx-NIOWR)
d(NIORD-NCEx)
h(NCEx-NIORD)
t
t
t
t
su(D-NIORD)
d(NIORD-D)
v(NIOWR-D)
h(NIOWR-D)
L
t
t
Symbol
w(NIOWR)
w(NIORD)
= 30 pF.
Switching characteristics for PC Card/CF read and write cycles in I/O space
NAND controller waveforms and timings
Figure 69
Table 80
with the following FSMC configuration:
●
●
●
●
●
●
●
●
●
●
●
●
●
●
In all timing tables, the
COM.FSMC_SetupTime = 0x01;
COM.FSMC_WaitSetupTime = 0x03;
COM.FSMC_HoldSetupTime = 0x02;
COM.FSMC_HiZSetupTime = 0x01;
ATT.FSMC_SetupTime = 0x01;
ATT.FSMC_WaitSetupTime = 0x03;
ATT.FSMC_HoldSetupTime = 0x02;
ATT.FSMC_HiZSetupTime = 0x01;
Bank = FSMC_Bank_NAND;
MemoryDataWidth = FSMC_MemoryDataWidth_16b;
ECC = FSMC_ECC_Enable;
ECCPageSize = FSMC_ECCPageSize_512Bytes;
TCLRSetupTime = 0;
TARSetupTime = 0;
FSMC_NIOWR low width
FSMC_NIOWR low to FSMC_D[15:0] valid
FSMC_NIOWR high to FSMC_D[15:0] invalid
FSMC_NCE4_1 low to FSMC_NIOWR valid
FSMC_NCEx high to FSMC_NIOWR invalid
FSMC_NCEx low to FSMC_NIORD valid
FSMC_NCEx high to FSMC_NIORD) valid
FSMC_NIORD low width
FSMC_D[15:0] valid before FSMC_NIORD
high
FSMC_D[15:0] valid after FSMC_NIORD high
provides the corresponding timings. The results shown in this table are obtained
through
Figure 72
Parameter
T
HCLK
represent synchronous waveforms, together with
is the HCLK clock period.
Doc ID 15818 Rev 8
8T
5T
8T
8T
5T
HCLK
HCLK
HCLK
HCLK
Min
9.5
HCLK
0
-
-
-
– 0.5
- 0.5
+ 1
- 3
Electrical characteristics
5T
5T
5T
HCLK
HCLK
HCLK
Max
-
-
-
-
-
+ 1.5
+ 1
- 1
Table 79
(1)(2)
137/170
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
and