ST7LIT10BY1 STMicroelectronics, ST7LIT10BY1 Datasheet - Page 82
ST7LIT10BY1
Manufacturer Part Number
ST7LIT10BY1
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet
1.ST7LIT10BF0.pdf
(159 pages)
Specifications of ST7LIT10BY1
Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
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ST7LITE1xB
LITE TIMER (Cont’d)
Bit 6 = ICF Input Capture Flag
This bit is set by hardware and cleared by software
by reading the LTICR register. Writing to this bit
does not change the bit value.
0: No input capture
1: An input capture has occurred
Note: After an MCU reset, software must initialize
the ICF bit by reading the LTICR register
Bit 5 = TB Timebase period selection
This bit is set and cleared by software.
0: Timebase period = t
* 8000 (1ms @ 8 MHz)
OSC
1: Timebase period = t
* 16000 (2ms @ 8
OSC
MHz)
Bit 4 = TB1IE Timebase Interrupt enable
This bit is set and cleared by software.
0: Timebase (TB1) interrupt disabled
1: Timebase (TB1) interrupt enabled
Bit 3 = TB1F Timebase Interrupt Flag
This bit is set by hardware and cleared by software
reading the LTCSR register. Writing to this bit has
no effect.
0: No counter overflow
1: A counter overflow has occurred
Bits 2:0 = Reserved
LITE TIMER INPUT CAPTURE REGISTER
(LTICR)
Read only
Reset Value: 0000 0000 (00h)
7
0
ICR7
ICR6
ICR5
ICR4
ICR3
ICR2
ICR1
ICR0
Bits 7:0 = ICR[7:0] Input Capture Value
These bits are read by software and cleared by
hardware after a reset. If the ICF bit in the LTCSR
is cleared, the value of the 8-bit up-counter will be
captured when a rising or falling edge occurs on
the LTIC pin.
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