TMP86xy46NG Toshiba, TMP86xy46NG Datasheet - Page 31
TMP86xy46NG
Manufacturer Part Number
TMP86xy46NG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY46NG.pdf
(171 pages)
Specifications of TMP86xy46NG
Package
SDIP42
Rom Types (m=mask,p=otp,f=flash)
M/P/F
Rom Size
8/16/32
Ram Size
512/512/1K
Driver Led
19
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
-
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
8
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
33
Power Supply (v)
4.5 to 5.5
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2.2 System Clock Controller
2. Operational Description
2.2.4.2
interrupts. The following status is maintained during these modes.
IDLE1/2 mode and SLEEP1/2 mode
IDLE1/2 and SLEEP1/2 modes are controlled by the system control register 2 (SYSCR2) and maskable
1. Operation of the CPU and watchdog timer (WDT) is halted. On-chip peripherals continue to
2. The data memory, CPU registers, program status word and port output latches are all held in the
3. The program counter holds the address 2 ahead of the instruction which starts these modes.
operate.
status in effect before these modes were entered.
Figure 2-10 IDLE1/2 and SLEEP1/2 Modes
release mode
Normal
“0”
No
Execution of the instruc-
IDLE1/2 and SLEEP1/2
modes start instruction
CPU and WDT are halted
tion which follows the
Starting IDLE1/2 and
SLEEP1/2 modes by
Interrupt processing
Interrupt request
Page 20
Reset input
instruction
IMF
Yes
No
“1” (Interrupt release mode)
Yes
Reset
TMP86PM46NG
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