TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 148

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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Manufacturer:
TOSHIBA
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Configuration
Rev. 3.1 November 1, 2005
15:14
13
12
11:10
9:8
7:3
2
1:0
SPEED1
SPEED0
ITMODE[1:0]
DMASEL2
DMASEL1 &
DMASEL0
Reserved
RMII1 SPEED RMII1 Speed Select
RMII0 SPEED RMII0 Speed Select
Reserved
Internal Test
Mode
Reserved
DMA Request
Select 2
DMA Request
Select 1 &
Select 0
0: 10 Mbps transfer rate for RMII1
1: 100 Mbps transfer rate for RMII1
This bit used only if external PHY does not have pin to
indicate the speed.
0: 10 Mbps transfer rate for RMII0
1: 100 Mbps transfer rate for RMII0
This bit used only if external PHY does not have pin to
indicate the speed.
Internal Test Mode
00: Normal operation
For normal operation, must keep these two bits 00. These
bits are only for debug purpose.
Selects a DMA request used by DMA controller 0 channel 2.
0: DMAREQ[2] (external)
1: SIO channel 0 reception (internal)
Selects a DMA request used by DMA controller 0 channel 1.
00: DMAREQ[1] (external)
01: Reserved
7-10
Toshiba RISC Processor
0
0
00
0
00
R/W
R/W
R/W
R/W
R/W
TX4939
7
7

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