TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 15

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Index
CHAPTER 27. EJTAG INTERFACE.............................................................................................................................. 27-1
CHAPTER 28. ELECTRICAL CHARACTERISTICS ..................................................................................................... 28-1
CHAPTER 29. PACKAGE OUTER APPEARANCE...................................................................................................... 29-1
Rev. 3.1 November 1, 2005
27.1. E
27.2. JTAG B
27.3. P
27.4. D
27.5. R
28.1. A
28.2. R
28.3. DC C
28.4. AC C
29.1. P
29.2. R
26.7.1. RNG Registers ......................................................................................................................................... 26-17
27.2.1. JTAG Controller and Register .................................................................................................................... 27-2
27.2.2. Instruction Register .................................................................................................................................... 27-3
27.2.3. Boundary Scan Register ............................................................................................................................ 27-4
27.2.4. Device ID Register ..................................................................................................................................... 27-4
27.2.5. Initializing the Extended EJTAG Interface .................................................................................................. 27-4
27.2.6. Features..................................................................................................................................................... 27-5
27.2.7. EJTAG interface ......................................................................................................................................... 27-5
27.2.8. JTAG Interface ........................................................................................................................................... 27-6
27.2.9. Processor Access Overview....................................................................................................................... 27-6
27.2.10. Instruction ................................................................................................................................................ 27-6
27.2.11. Debug Unit ............................................................................................................................................... 27-7
27.2.12. Register Map............................................................................................................................................ 27-7
27.4.1. Debug Single Step (DSS)........................................................................................................................... 27-8
27.4.2. Debug Breakpoint exception (Dbp) ............................................................................................................ 27-8
27.4.3. JTAG Break Exception ............................................................................................................................... 27-8
27.4.4. Debug Exception Handling......................................................................................................................... 27-8
27.4.5. Branching to debug handler ....................................................................................................................... 27-8
27.4.6. Exception handling when in Debug Mode (DM bit is set) ........................................................................... 27-8
28.3.1. DC Characteristics of Pins (Except PCI I/F)............................................................................................... 28-2
28.3.2. DC Characteristics of Pins (PCI I/F)........................................................................................................... 28-3
28.4.1. MSTCLK, MSTCLK2 AC Characteristics.................................................................................................... 28-4
28.4.2. Power ON AC Characteristics .................................................................................................................... 28-4
28.4.3. DDR SDRAM Interface AC Characteristics ................................................................................................ 28-5
28.4.4. External Bus Interface AC Characteristics ............................................................................................... 28-10
28.4.5. PCI Interface AC Characteristics...............................................................................................................28-11
28.4.6. AC-link Interface AC characteristics ......................................................................................................... 28-13
28.4.7. SPI AC characteristics ............................................................................................................................. 28-14
28.4.8. AC characteristics of ATA Interface .......................................................................................................... 28-15
28.4.9. Ethernet Interface (RMII) AC characteristics ............................................................................................ 28-20
28.4.10. AC Characteristics of Video Port ............................................................................................................ 28-22
ACKAGE
XTENDED
ROCESSOR
BSOLUTE
EBUG
EAL
ECOMMENDED
ECOMMENDED
HARACTERISTICS
T
HARACTERISTICS
IME
E
OUNDARY
XCEPTION
D
M
EJTAG I
PC TRACE O
RAWING
AXIMUM
B
US
O
M
B
PERATING
OTHERBOARD
S
REAK
.............................................................................................................................................. 27-8
.............................................................................................................................................. 29-1
CAN
NTERFACE
R
.......................................................................................................................................... 28-4
ATING
......................................................................................................................................... 28-2
T
F
UTPUT
EST
UNCTION
C
................................................................................................................................ 28-1
............................................................................................................................... 27-2
ONDITIONS
.............................................................................................................................. 27-1
F
........................................................................................................................... 27-8
OOTPRINT
...................................................................................................................... 27-8
............................................................................................................... 28-1
........................................................................................................... 29-2
xi
Toshiba RISC Processor
TX4939