TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 151

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Configuration
Rev. 3.1 November 1, 2005
63:62
61
60
59
58
57
56
55
54
53:52
51
50
49
48
47
46
45
44
43
42
41
40
39
Bit
⎯
TMR5CKD
TMR4CKD
TMR3CKD
CIRCKD
SIO3CKD
SIO2CKD
SIO1CKD
VPCCKD
⎯
ETH1CKD
ATA1CKD
BROMCKD
NDCCKD
I2CCKD
ETH0CKD
SPICKD
SRAMCKD
PCIC1CKD
DMA1CKD
ACLCKD
ATA0CKD
DMA0CKD
Mnemonic
Reserved
Timer 5 Clock
Disable
Timer 4 Clock
Disable
Timer 3 Clock
Disable
CIR Clock
Disable
SIO3 Clock
Disable
SIO2 Clock
Disable
SIO1 Clock
Disable
VPC Clock
Disable
Reserved
ETH1 Clock
Disable
ATA1 Clock
Disable
BROM Clock
Disable
NDC Clock
Disable
I2C Clock
Disable
ETHERC0
Clock Disable
SPIC Clock
Disable
SRAMC Clock
Disable
PCIC1 Clock
Disable
DMAC1 Clock
Disable
ACLC Clock
Disable
ATA0 Clock
Disable
DMAC0 Clock
Disable
Field Name
⎯
Controls clock pulses for the TMR5 controller
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the TMR4 controller
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the TMR3 controller
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the CIR controller
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the SIO3 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the SIO2 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the SIO1 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the VPC controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
⎯
Controls clock pulses for the Ethernet MAC 1 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the ATA1 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the BROM/SRAM controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the NAND Flash controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the I2C controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the Ethernet MAC 0 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the SPI controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the internal SRAM controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for PCI controller 1.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the DMA controller 1.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the AC-link controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the ATA0 controller.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Controls clock pulses for the DMA controller 0.
0 = Supply clock pulses.
1 = Do not supply clock pulses.
Table 7-6 Clock Control Register
7-13
Description
Toshiba RISC Processor
⎯
0
0
0
0
0
0
0
0
⎯
0
0
0
0
0
0
0
0
0
0
0
0
0
Initial
Value
⎯
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read/Write
TX4939
7
7