TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 155

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Configuration
7.2.7. Register Address Mapping Register (RAMP)
Rev. 3.1 November 1, 2005
63:20
19:0
Bit
63
47
31
15
62
46
30
14
⎯
RAMP[35:16]
Mnemonic
61
45
29
13
60
44
28
12
Reserved
Register
Address
Mapping
Field Name
59
43
27
11
RESERVED
Figure 7-7 Register Address Mapping Register
Table 7-8 Register Address Mapping Register
58
42
26
10
⎯
This is a base address register for the TX4939 built-in
registers. It holds the high-order 20 bits of a register
address.
The default built-in register base address is
0xF_FF1F_0000. Even after the content of the base
address register is changed, the default value can be used
to reference the built-in registers.
(Refer to "4.2 Register Mapping".)
57
41
25
9
RAMP[31:16]
RESERVED
RESERVED
56
40
24
8
0xFF1F
R/W
55
39
23
7-17
7
Description
54
38
22
6
53
37
21
5
52
36
20
4
51
35
19
3
RAMP[35:32]
50
34
18
2
Toshiba RISC Processor
R/W
0xF
49
33
17
1
⎯
0xF_FF1F
Initial Value
0xE048
48
32
16
0
: Default
: Default
: Default
: Default
: R/W
: R/W
: R/W
: R/W
TX4939
⎯
R/W
R/W
7
7