TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 251

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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RTC
11.4.
11.4.1.
Real Time Clock uses an external crystal resonator. f
from the grade. Those grades are ±20 PPM, ±50 PPM, and ±100 PPM.
On the other hand, the required accuracy of final product varies depend on application. In case of conventional Arm Watch,
the accuracy is expressed by means of monthly error or annual error in terms of second unit. For example, ±15 seconds
per month etc. Since a month (30days) consists of 2,592,000 seconds (=60 x 60 x 24 x 30), ± seconds per month
corresponds to ±5.8 PPM (=15 / 2,592,000 x 1,000,000).
It is the common way to adjust frequency by using trimmer capacitance (i.e. variable capacitance) in factory. However, this
adjustment work is not so convenient for factory automation.
This supplement provides an electrical means to adjust the 32,768 Hz frequency.
Figure 11-3 shows the skeleton of this time base corrector module.
Internal to RTC there are 47-bit counter (RTC[47:1]). In Figure 11-3, 12-bit binary counter is corresponding to RTC[12:1].
And 7-bit binary counter is corresponding to RTC[19:13]. RTC[0] is always “0”. The 47-bit counter counts on every clock
edge of 32.768 KHz oscillator clock (CLK32K).
This module is the part of divider circuit in RTC. It divides original 32,768 Hz clock binary manner. Since this divider chain
consists of 19 flip-flops, actual divisor is 2
adding N clock(s) (N=1-127) per one round of this 19-stage counter delays 2N PPM in the RTC time base. Respectably,
skipping 2N clock(s) advances 2N PPM.
When COMP[6:0] = 0000001 then N=1 or when COMP[6:0] = 1111111 then N=127
Rev. 3.1 November 1, 2005
RTCLOAD
8-BIT REGISTER
CLK32K
FIELD Definition
DEFAULT
Time Base Calibration
8 Sec 4 Sec 2 Sec 1 Sec
SQ6
R/W
Theory of Operation
SQ5
SQ4
7-bit counter
SQ3
R/W
Q7
SR SQ6 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0
PM
7
0
Figure 11-3 Logic Diagram of Time Base Corrector
Q6
SQ2
1
2
7-bit binary counter
Q5
Figure 11-4 Definition of 8-BIT REGISTER
8-bit register
7-bit comparator
SQ1
19
1
4
Q4
R/W
6
(=524288). This number is approximately one million. Based on this condition,
0
Q3
SQ0
1
8
Q2
Q11
16
1
Q1
0
R/W
of this crystal resonator is 32,768 Hz. The accuracy can be selected
5
0
Q0
11-7
Q10
32
1
Q9
64
1
R/W
4
0
SR Q11 Q10 Q9
128
Q8
1
PM
Q11 Q10 Q9
GT
RS
COMP [6:0]
256
Q7
1
R/W
12-bit counter
3
0
512
Q6
1
Q8
Q8
12-bit binary counter
1024
Q5
1
Q7
Q7
Control Logic
R/W
Toshiba RISC Processor
2
0
Q6
Q6
2048
Q4
1
Q5
Q5
4096
Q3
1
Q4
Q4
R/W
Q3
Q3
8192
1
0
Q2
1
Q2
Q2
16384
Q1
1
Q1
Q1
R/W
32768
TX4939
Q0
Q0
Q0
0
0
Rev 1.03
1
11
11

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