TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 343

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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DDR
15.7.2.2. DDR Mapping Window Control (DRWINEN)
This registers enables or disables each DDR Mapping Register also defines the drive strength of DDR memory signals.
Before enabling any Mapping Window, i.e. Windows #0 to #3, corresponding registers, i.e. DRWIN00, DRWIN01,
DRWIN02, and DRWIN03, has to be preset with precise value.
If failed, the system might cause serious malfunction and result is unknown.
Rev. 3.1 November 1, 2005
Bit
63:32
31:30
29:28
27:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
3
2
1
0
9:8
31
15
DCWE
2’b00
2’b00
DCA
R/W
R/W
Mnemonic
DCA
DCDQ
DCDQS
DCDM
DCCS
DCCK
DCCKO
DCBA
DCWE
DCCAS
DCRAS
DCCKE
EN03
EN02
EN01
EN00
30
14
29
13
DCCAS
DCDQ
2’b00
2’b00
R/W
R/W
28
12
Field Name
Reserved
DC_DRA
DSC_DRDQ
DSC_DRDQS
DSC_DRDM
DSC_DRCS
DSC_DRCK
DSC_DRCKOUT
DSC_DRBA
DSC_DRWE
DSC_DRCAS
DSC_DRRAS
DSC_DRCKE
ENWIN03
ENWIN02
ENWIN01
ENWIN00
27
11
DCDQS
DCRAS
2’b00
2’b00
R/W
R/W
26
10
Figure 15-8 DDR Mapping Window Control
Table 15-1 DDR Mapping Window Control
25
9
DCCKE
DCDM
2’b00
2’b00
R/W
R/W
Description
Drive Strength Control of DRA[13:0] signal
.. 2’b11 = maximum strength (100%)
Drive Strength Control of DRDQ[31:0]
Drive Strength Control of DRDQS[3:0]
Drive Strength Control of DRDM[3:0]
Drive Strength Control of DRCS[1:0]
Drive Strength Control of DRCKP and DRCKP
Drive Strength Control of DRCKOUT
Drive Strength Control of DRBA[1:0]
Drive Strength Control of DRWE
Drive Strength Control of DRCAS
Drive Strength Control of DRRAS
Drive Strength Control of DRCKE
1'b1 = Enable Window #3, 1'b0 = Disable
1'b1 = Enable Window #2, 1'b0 = Disable
1'b1 = Enable Window #1, 1'b0 = Disable
1'b1 = Enable Window #0, 1'b0 = Disable
2’b00 = 28% of maximum strength
2’b01 = 57% of maximum strength
2’b10 = 71% of maximum strength
Control is same as above
Control is same as above
Control is same as above
Control is same as above
Control is same as above
Control is same as above
Control is same as above
Control is same as above
Control is same as above
Control is same as above
Control is same as above
24
8
15-13
23
7
DCCS
2’b00
R/W
RESERVED
22
6
21
5
DCCK
2’b00
R/W
20
4
EN03 EN02 EN01 EN00
R/W
19
DCCKO
3
0
2’b00
R/W
R/W
18
2
0
Toshiba RISC Processor
R/W
17
1
0
DCBA
2’b00
R/W
Initial Value
2’b00
2’b00
2’b00
2’b00
2’b00
2’b00
2’b00
2’b00
2’b00
2’b00
2’b00
2’b00
0
0
0
0
R/W
16
0
0
: Default
: Default
: R/W
: R/W
TX4939
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
15
15

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