TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 494

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

EMAC
18.2. Block diagram
Each of the two Ethernet controllers in TX4939 resides behind an internal 32 bit 66Mhz PCI bus. The system level block
diagram of the two Ethernet controllers is given in Figure 18-1.
Depending on the ATA1MODE, ET0MODE and ET1MODE configuration bits (Chapter 7), 1, or 2 Ethernet channels are
usable. Table 18-1 gives the list of usable eMAC channels dependent on ATA1MODE, ET0MODE, and ET1MODE.
Note: Unusable Ethernet channels are not accessible through the internal PCI Bus.
Rev. 3.1 November 1, 2005
ATA1MODE
0
0
0
0
1
Table 18-1 Usable eMAC channels based on Product Mode selection
Figure 18-1 System Level block diagram of Quad eMAC in TX4939
ET0MODE
0
1
0
1
0
GBUS 64 bit 200 Mhz
PCI 32 bit 66Mhz
ET1MODE
0
0
1
1
0
18-2
EMAC(1)
RMII(1)
10/100
Mbps
PCIC1
PGB1
Function Result
All GPIO (Boot-up default)
Ethernet Channel 0 and GPIO
Ethernet Channel 1 and GPIO
Ethernet 0, 1 and GPIO
ATA100-1, no GPIO
Toshiba RISC Processor
EMAC(0)
RMII(0)
10/100
Mbps
TX4939
18
18