TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 535

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

EMAC
18.4.2.7. I/O, Memory Base Address Registers
I/O Base Address Register (IO_BaseA) 0x10
The I/O Base Address Register and Memory Base Address Register are used to map the DMA and MAC Control
Registers or Status Registers to the I/O address space or system memory space. Both the I/O address space and
memory address space have a maximum size of 32 bits. In addition to setting the Base Address Register, you have to set
the corresponding Control bits in the PCI Command Register.
Hardware resets initialize the I/O Base Address Register to 0x0000_0001. Software resets do not change the register
contents.
Memory Address Register (MLo_BaseA) 0x14
Hardware resets initialize the Memory Base Address Register to 0x0000_0000. Software resets do not change the
register contents.
Rev. 3.1 November 1, 2005
31 : 8
7 : 1
0
Bit(s)
31 : 8
7 : 3
2 : 1
0
Bit(s)
Default
Default
Default
Default
Name
Name
Name
Name
TYPE
TYPE
TYPE
TYPE
31
15
31
15
Mnemonic
BaseAddr
I/O
Mnemonic
BaseAddr
Loc
I/O
30
14
30
14
29
13
29
13
Field Name
Base Address
I/O Flag
Field Name
Base Address
Location Bit
I/O Flag
28
12
BaseAddr
28
12
BaseAddr
0x00
0x00
R/W
R/W
Figure 18-26 Memory Base Address Register
Figure 18-25 I/O Base Address Register
27
11
27
11
26
10
26
10
25
25
9
9
18-43
Description
BaseAddr (Default: 0x000000, R/W)
This field sets the upper 24 bits of the base address
Fixed to “0”.
I/O (fixed to “1”, R)
Indicates that this base address is relative to the I/O space.
Description
BaseAddr (Default: 0x00_0000, R/W)
This field sets the upper 24 bits of the base address.
Fixed to “0”.
Loc (Default: 00, R)
This field indicates that memory is placed in a 32-bit address
space.
Memory (Default: 0, R)
Indicates that this base address is relative to the memory space.
24
24
BaseAddr
BaseAddr
8
8
0x0000
0x0000
R/W
R/W
23
23
7
7
22
22
6
6
21
21
5
5
0
20
20
4
0
4
Toshiba RISC Processor
19
19
3
3
18
18
2
2
Loc
0x0
R
17
17
1
1
TX4939
I/O
I/O
16
16
R
R
0
1
0
0
18
18