TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 688

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

SRAM
25.3. Detailed explanation
25.3.1. Base address
Specify the base address of the on-chip SRAM in 2-KB boundary units (specify the upper 25 bits of the physical address).
Operation is not guaranteed if the address overlaps with an address space set by SDRAMC, EBUSC, etc.
25.3.2. Access cycle count
The following table shows the GBUSCLK cycle count required to access on-chip SRAM.
Rev. 3.1 November 1, 2005
Access Type
Single Read
Single Write
Burst Read
Burst Write
SRBA
Figure 25-2 Base Address Specification
Table 25-1 Access Cycle Count
GBUSCLK Cycle Count (n= Burst Size (1-8))
3
3
2+n
2+n
Physical Address Space
SRAM Area
25-2
0x 0_0000_0000
0x F_FFFF_FFFF
2 KB
Toshiba RISC Processor
TX4939
25
25