SAB C165-LM Infineon Technologies, SAB C165-LM Datasheet - Page 70
SAB C165-LM
Manufacturer Part Number
SAB C165-LM
Description
Manufacturer
Infineon Technologies
Datasheet
1.SAF_C165-LM.pdf
(77 pages)
Specifications of SAB C165-LM
Packages
PG-MQFP-100
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
2.0 KByte
Program Memory
0.0 KByte
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AC Characteristics
CLKOUT and READY (Reduced Supply Voltage)
(Operating Conditions apply)
Parameter
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
CLKOUT rising edge to
ALE falling edge
Synchronous READY
setup time to CLKOUT
Synchronous READY
hold time after CLKOUT
Asynchronous READY
low time
Asynchronous READY
setup time
Asynchronous READY
hold time
Async. READY hold time
after RD, WR high
(Demultiplexed Bus)
1)
2)
Data Sheet
These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This
adds even more time for deactivating READY.
The 2
The maximum limit for
t
A
and
1)
1)
t
C
refer to the next following bus cycle,
t
2)
60
must be fulfilled if the next following bus cycle is READY controlled.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
29
30
31
32
33
34
35
36
37
58
59
60
CC 50
CC 15
CC 13
CC –
CC –
CC 0 +
SR 18
SR 4
SR 68
SR 18
SR 4
SR 0
min.
Max. CPU Clock
t
= 20 MHz
A
66
t
F
refers to the current bus cycle.
max.
50
–
–
12
8
8 +
–
–
–
–
–
0
+ 2
t
+
C
t
F
t
2)
t
A
A
+
1 / 2TCL = 1 to 20 MHz
min.
2TCL
TCL - 10
TCL - 12
–
–
0 +
18
4
2TCL +
18
4
0
Variable CPU Clock
t
A
t
58
–
–
TCL – 25
max.
2TCL
12
8
8 +
–
–
–
–
–
+ 2
+
t
F
t
2)
t
A
A
V2.0, 2000-12
+
t
C
C165
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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