74LV245PW,118 NXP Semiconductors, 74LV245PW,118 Datasheet - Page 3
![IC TRANSCVR TRI-ST 8BIT 20TSSOP](/photos/6/52/65219/568-20-tssop_sot360-1_sml.jpg)
74LV245PW,118
Manufacturer Part Number
74LV245PW,118
Description
IC TRANSCVR TRI-ST 8BIT 20TSSOP
Manufacturer
NXP Semiconductors
Series
74LVr
Datasheet
1.74LV245N112.pdf
(15 pages)
Specifications of 74LV245PW,118
Logic Type
Transceiver, Non-Inverting
Package / Case
20-TSSOP
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
16mA, 16mA
Voltage - Supply
1 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LV
Number Of Channels Per Chip
8
Input Level
LVTTL
Output Level
LVTTL
Output Type
3-State
High Level Output Current
- 16 mA
Low Level Output Current
16 mA
Propagation Delay Time
45 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1 V
Maximum Operating Temperature
+ 125 C
Function
Bus Transceiver
Input Bias Current (max)
160 uA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Non-Inverting
Number Of Circuits
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LV245PW-T
74LV245PW-T
935174660118
74LV245PW-T
935174660118
NXP Semiconductors
5. Pinning information
Table 2.
6. Functional description
Table 3.
[1]
74LV245_3
Product data sheet
Symbol
DIR
A0 to A7
GND
B0 to B7
OE
V
Input
OE
L
L
H
Fig 3.
CC
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Pin configuration DIP20, SO20
Pin description
Function selection
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
5.1 Pinning
5.2 Pin description
10
1
2
3
4
5
6
7
8
9
74LV245
DIR
L
H
X
[1]
001aaj962
20
19
18
17
16
15
14
13
12
11
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
Description
direction control
data input/output
ground (0 V)
data input/output
output enable input (active LOW)
supply voltage
Rev. 03 — 15 April 2009
Output/input
An
A = B
input
Z
Fig 4.
Pin configuration SSOP20, TSSOP20
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
10
1
2
3
4
5
6
7
8
9
Octal bus transceiver; 3-state
74LV245
Bn
input
B = A
Z
001aaj963
© NXP B.V. 2009. All rights reserved.
74LV245
20
19
18
17
16
15
14
13
12
11
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
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