PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 89
PM5380-BI
Manufacturer Part Number
PM5380-BI
Description
Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5380-BI.pdf
(440 pages)
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Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
10.16 WAN Synchronization Controller (WANS)
The WANS provides hardware support to implement a local clock reference compliant to
SONET/SDH Stratum 3 clock specifications (GR-253-CORE & GR-1244-CORE) in wander
transfer, long term and holdover stability. The WANS block is intended to be used in
conjunction with an external processor, digital to analog converter (DAC), analog circuitry and
voltage control crystal oscillator (VCXO).
In general, WANS block implements the phase detector of a phase lock loop structure which
relies on an external processor and a VCXO to produce the Stratum 3 clock as shown in Figure
10. The WANS performs a digital phase comparison between the recovered receive clock
(receive line rate clock from a clock recovery unit) and the reference clock used to generate the
transmit stream for all channels (REFCLK+/- supplied by the VCXO).
Figure 10 WANS PLL Block Diagram
The software running on the external processor is responsible for performing: digital loop
filtering, temperature compensation, VCXO linearity compensation; determining the validity of
the timing reference; and performing reference switchover. The VCXO creates the 77.76 MHz
Stratum 3 reference clock which the CSU will synthesize to the desired 155.52 MHz transmit
clock.
Thus, the WANS PLL structure can phase lock the SONET/SDH transmit serial stream to the
SONET/SDH receive serial stream. With appropriate software filtering and compensation, the
device may meet SONET/SDH Stratum 3 clock specifications (GR-253-CORE & GR-1244-
CORE) in wander transfer, long term and holdover stability.
A description of the functionality supplied by the WANS block is given below.
REFCLK+/-
RXD+/-
TXD+/-
CSU
CRU
Detector)
(Phase
WANS
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
PISO
SIPO
Microprocessor Interface
TCLK
SONET/SDH
Transmit Stream
RCLK
SONET/SDH
Recieve Stream
Correction
(Software)
Filtering/
External
VCXO
DAC
Released
89
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