LMX2364 National Semiconductor Corporation, LMX2364 Datasheet - Page 24

• Manufacturer Part Number: LMX2364
• Description: 2.6 Ghz Pllatinum Fractional Rf Frequency Synthesizer With 850 Mhz Integer If Frequency Synthesizer
• Manufacturer: National Semiconductor Corporation

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Reg
R0
R1
R2
R3
R4
R5
R6
Programming Description
2.0 INPUT DATA REGISTER
The 24-bit input data register is loaded through the MICROWIRE Interface. The input data register is used to program the control
registers. The data format of the 24-bit data register is shown below. The control bits (CTL[2:0]) decode the internal register
address and the data bits (DATA[21:0]) are used to program various control words for the synthesizer. On the rising edge of LE,
data stored in the input date register is loaded into one of the 8 appropriate latches (selected by control bits). Data is shifted in
MSB first
2.1 REGISTER LOCATION TRUTH TABLE
The control bits CTL[2:0] decode the internal register address. The table below shows how the control bits are mapped to the
target control register.
2.2 CONTROL REGISTER CONTENT MAP
The control register content map describes how the bits within each control register are allocated to specific control functions. The
bits that are marked “0” should be programmed as such to insure proper device operation. It is important to note that some control
words are dual mapped and take one a different control function depending on the operating mode of the device.
RST
RF_
RF_
IF_
PD
PD
23
0
0
0
0
RF_
CSR[1:0]
22
0
0
0
P
0
RF_
CPP
RF_
21
0
0
0
0
RST
IF_
20
OM[1:0]
0
0
CP[1:0]
0
RF_
RF_
IF_
CP
19
0
0
CPP
IF_
CPF[1:0]
18
0
0
RF_
17
0
0
RF_N[12:0]
MSB
DATA [21:0]
23
FE
16
CTL[2:0]
15
0
0
1
2
3
4
5
6
7
RF_R[8:0]
14
0
DATA[20:0]
13
0
Target Control Register
This address is invalid.
12
24
0
IF_N[16:0]
11
0
R0
R1
R2
R3
R4
R5
R6
IF_R[14:0]
3 2
RF_TOC[13:0]
IF_TOC[13:0]
10
0
CTL[2:0]
9
0
LSB
PD_
M
8
0
OSC
7
RF_FD[6:0]
RF_FN[6:0]
6
MUX[3:0]
5
4
3
C2
2
0
0
0
0
1
1
1
C1
1
0
0
1
1
0
0
1
C0
0
0
1
0
1
0
1
0