HT45R37V Holtek Semiconductor Inc., HT45R37V Datasheet - Page 72

• Manufacturer Part Number: HT45R37V
• Description: C/r-f Type 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

time-out period may vary with temperature, VDD and
process variations. As the clear instruction only resets
the last stage of the divider chain, for this reason the ac-
tual division ratio and corresponding Watchdog Timer
time-out can vary by a factor of two. The exact division
ratio depends upon the residual value in the Watchdog
Timer counter before the clear instruction is executed.
If the f
source, it should be noted that when the system enters
the Power Down Mode, then the instruction clock is
stopped and the Watchdog Timer will lose its protecting
purposes. For systems that operate in noisy environ-
ments, using the 32K_INT RC oscillator is strongly rec-
ommended.
Under normal program operation, a Watchdog Timer
time-out will initialise a device reset and set the status bit
TO. However, if the system is in the Power Down Mode,
when a Watchdog Timer time-out occurs, the TO bit in
the status register will be set and only the Program
Counter and Stack Pointer will be reset. Three methods
can be adopted to clear the contents of the Watchdog
Timer. The first is an external hardware reset, which
means a low level on the RES pin, the second is using
the watchdog software instructions and the third is via a
Rev. 1.00
HALT instruction.
SYS
/4 clock is used as the Watchdog Timer clock
Watchdog Timer Software Control - MISC
Watchdog Timer
72
Clearing the Watchdog Timer
There are two methods of using software instructions to
clear the Watchdog Timer, one of which must be chosen
by configuration option. The first option is to use the sin-
gle CLR WDT instruction while the second is to use the
two commands CLR WDT1 and CLR WDT2 . For the
first option, a simple execution of CLR WDT will clear
the WDT while for the second option, both CLR WDT1
and CLR WDT2 must both be executed to successfully
clear the Watchdog Timer. Note that for this second op-
tion, if CLR WDT1 is used to clear the Watchdog Timer,
successive executions of this instruction will have no ef-
fect, only the execution of a CLR WDT2 instruction will
clear the Watchdog Timer. Similarly after the CLR
WDT2 instruction has been executed, only a successive
CLR WDT1 instruction can clear the Watchdog Timer.
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October 20, 2009
HT45R37V