TDC-GP2 acam messelectronic gmbh, TDC-GP2 Datasheet - Page 28

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TDC-GP2

Manufacturer Part Number
TDC-GP2
Description
Precision Time Interval Measurement
Manufacturer
acam messelectronic gmbh
Datasheet

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The fire- pulse generator allows to generate and send
pulse sequences multiple times for use in a quasi “sing-
around” method. Using this feature the received pulse
sequence is fed into TDC-GP2 Fire_In input. It is digitally
amplified and directly forwarded to the output buffer for
an immediate re-emittance without any clock delay.
5.2.2 Configuration
Number of pulses:
FIRE# = 0
Phase:
The phase of each pulse can be defined in register 5,
Bits 0 to 15, PHASE_FIRE. "0" stands for LOW-HIGH
and "1" for HIGH-LOW. The pulse sequence begins with
the LSB and ends with the MSB
Example:
Fire# = 7, PHASE_FIRE = 0xE
Fire
Fire - - - - pulse frequency:
Fire
Fire
The input signal f
derived from the high speed clock CLKHS and the
selected value for the high speed clock divider
CLKHS_DIV.
This Signal is internally doubled and divided by
DIV_FIRE.
DIV_FIRE = 0
Register 5, Bit 19, DIS_PHASESHIFT actives the phase
shift, which introduces additional noise to improve
statistical behaviour when averaging.
DIS_PHASESHIFT = 0
DIS_PHASESHIFT = 1
CLKHS
0
CLKHS_DIV
pulse frequency:
pulse frequency:
pulse frequency:
1
1
1
2
15
n
1
1
acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de
1
2
...
15
f
fireclk1
0 0 0
divided by 16
Switch off fire-pulse generator
1 pulse
2 pulses
15 pulses
not permitted
divided by 2
divided by 3
...
f i r e c l k 1
DIS_PHASESHIFT
frequency
doubling
for the fire pulse generator is
1
0.5
Figure 15
Phase shift on
Phase shift off
Pulse-Generator
Phase-
shift
DIV_FIRE
1
m
PHASE_FIRE
CONF_FIRE
f
fireclk2
Generator
Fire-
16
3
28
Fire1
Fire2
f
signal which is emitted by the output buffers Fire1 /
Fire 2 of the fire pulse generator.
As shown in Figure 16 at least 2 clock periods T
are required to send one Fire_Pulse. One for the high
phase and one for the low phase of the Fire1/Fire2
output signal.
Example:
CLKHS = 4 MHz, CLKHS_DIV = 1, DIV_FIRE = 1
Max. frequency of the Fire1 / Fire2 output signal:
Driver outputs:
The output drivers are configured in register 5, Bits 21
to 23, CONF_FIRE:
Bit 23 = 1
Bit 22 = 1
Bit 21 = 2
Pulse-burst repetition (quasi sing-around):
In register 5, Bits 16 to 18, REPEAT_FIRE the number
of repetitions of the pulse sequence is defined.
REPEAT_FIRE
Only the number of pulses set under FIRE# will be
repeated. With a period of 5 µs without a pulse the
TDC-GP2 detects the end of a pulse sequence.
Note: It is strongly recommend that the
summarized time of flight of the up to 7
repetitions does not exceed the measurement
range of the GP2!!!
f
f
f
f i r e c l k 2
Fire
fireclk
fireclk
1
f
f
/
Fire1 / Fire2
2
fireclk2
2
is used as reference signal for the Fire1 / Fire2 -
Fire
2
f
f
fireclk
fireclk
2
1
1
1
f
fireclk
DIV
DIV
Inverted output on FIRE2
FIRE2 disabled (High-Z)
FIRE1 disabled (High-Z)
= 0
= 1
...
= 7
T
2
_
_
fireclk2
T
FIRE
FIRE
2
2
Fire1 / Fire2
1
MHz
Figure 16
no repetition
1 repetition
...
7 repetitions
1
1
5.2 F i re-pul se Generator
2
MHz
TDC-GP2
f i r e c l k 2

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