MAX1718 Maxim, MAX1718 Datasheet - Page 31

• Manufacturer Part Number: MAX1718
• Description: Notebook CPU Step-Down Controller for Intel Mobile Voltage Positioning IMVP-II
• Manufacturer: Maxim

and careful consideration should go into the selection of
the final design.
The one-stage approach offers smaller total inductor
size and fewer capacitors overall due to the reduced
demands on the 5V supply. The transient response of
the single stage is better due to the ability to ramp up
the inductor current faster. The total efficiency of a sin-
gle stage is better than the two-stage approach.
The two-stage approach allows flexible placement due
to smaller circuit size and reduced local power dissipa-
tion. The power supply can be placed closer to the
CPU for better regulation and lower I
board traces. Although the two-stage design has worse
transient response than the single stage, this can be
offset by the use of a voltage-positioned converter.
Ceramic capacitors have advantages and disadvan-
tages. They have ultra-low ESR and are noncom-
bustible, relatively small, and nonpolarized. They are
also expensive and brittle, and their ultra-low ESR char-
acteristic can result in excessively high ESR zero fre-
quencies (affecting stability in nonvoltage-positioned
circuits). In addition, their relatively low capacitance
value can cause output overshoot when going abruptly
from full-load to no-load conditions, unless the inductor
value can be made small (high switching frequency), or
there are some bulk tantalum or electrolytic capacitors
in parallel to absorb the stored energy in the inductor.
In some cases, there may be no room for electrolytics,
creating a need for a DC-DC design that uses nothing
but ceramics.
Figure 17. Using Skip Mode During Suspend (SKP/ SDN = V
SUS
TO
Notebook CPU Step-Down Controller for Intel
SKP/SDN
SUS
V
CC
30kΩ
______________________________________________________________________________________
~
Ceramic Output Capacitor
200µs
0.01µF
Mobile Voltage Positioning (IMVP - II)
SHUTDOWN
~
200µs
3.3V
120kΩ
80kΩ
5V
V
CC
2
R losses from PC
0V
2.0V
Applications
TO
SKP/SDN
CC
)
Figure 18. Adjusting V
The MAX1718 can take full advantage of the small size
and low ESR of ceramic output capacitors in a voltage-
positioned circuit. The addition of the positioning resistor
increases the ripple at FB, lowering the effective ESR
zero frequency of the ceramic output capacitor.
Output overshoot (V
output capacitance requirement (see the Output
Capacitor Selection section). Often the switching frequen-
cy is increased to 550kHz or 1000kHz, and the inductor
value is reduced to minimize the energy transferred from
inductor to capacitor during load-step recovery. The effi-
ciency penalty for operating at 550kHz is about 2% to 3%
and about 5% at 1000kHz when compared to the
300kHz voltage-positioned circuit, primarily due to the
high-side MOSFET switching losses.
Careful PC board layout is critical to achieve low
switching losses and clean, stable operation. The
switching power stage requires particular attention
(Figure 19). If possible, mount all of the power compo-
nents on the top side of the board with their ground ter-
minals flush against one another. Follow these
guidelines for good PC board layout:
1) Keep the high-current paths short, especially at the
2) All analog grounding is done to a separate solid cop-
ground terminals. This is essential for stable, jitter-
free operation.
per plane, which connects to the MAX1718 at the
GND pin. This includes the V
MAX1718
DH
DL
FB
V
OUT
OUT
PC Board Layout Guidelines
= V
SOAR
FB
with a Resistor-Divider
x
V
(
BATT
1 +
) determines the minimum
R1
R2
)
R1
R2
CC
, REF, and CC
V
OUT
31