MAX3746 Maxim Integrated Products, MAX3746 Datasheet - Page 7
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MAX3746
Manufacturer Part Number
MAX3746
Description
Limiting Amplifier
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX3746.pdf
(13 pages)
The MAX3746 limiting amplifier consists of an input
buffer, a multistage amplifier, offset-correction circuitry,
an output buffer, power-detection circuitry, and signal-
detect circuitry (see the Functional Diagram ).
The input buffer is shown in Figure 3. It provides 50Ω ter-
mination for each input signal IN+ and IN-. The MAX3746
can be DC- or AC-coupled to a TIA (TIA output offset
degrades receiver performance if DC-coupled). The
CML input buffer is optimized for the MAX3744/
MAX3724 TIA.
The high-bandwidth multistage amplifier provides
approximately 60dB of gain.
14,15
8, 16
PIN
1, 4
10
11
12
13
EP
2
3
5
6
7
9
EXPOSED
DISABLE
OUTPOL
NAME
OUT+
OUT-
V
GND
V
RSSI
N.C.
PAD
LOS
IN+
_______________________________________________________________________________________
IN-
TH
CC1
CC2
Detailed Description
Supply Voltage
Noninverted Input Signal, CML
Inverted Input Signal, CML
Loss-of-Signal Threshold Pin. Resistor to ground (R
Connecting this pin to V
Disable Input, CMOS/TTL. The data outputs are held static when this pin is asserted high. The data
outputs are enabled when this pin is asserted low. The LOS function remains active when the
outputs are disabled.
Noninverted Loss-of-Signal Output. LOS is asserted high when the signal drops below the assert
threshold set by the TH input. The output is open collector.
Supply Ground
Output Polarity Control. Connect to GND for an inversion of polarity through the limiting amplifier
and connect to V
Inverted Data Output, CML
Noninverted Data Output, CML
Output Supply
Received-Signal-Strength Indicator. This current output can be used to obtain a ground-referenced
voltage proportional to the photodiode current with the MAX3744 by connecting an external resistor
between this pin and GND.
No Connection. Leave open.
Connect the exposed pad to board ground for optimal electrical and thermal performance.
Low-Power, 622Mbps to 3.2Gbps
Input Buffer
Gain Stage
CC
for normal operation. See Table 1 for all settings.
CC
disables the LOS circuitry and reduces power consumption.
The MAX3746 is susceptible to DC offsets in the signal
path because it has high gain. In communication sys-
tems using NRZ data with a 50% duty cycle, pulse-
width distortion present in the signal, or generated in
the transimpedance amplifier, appears as an input off-
set and is reduced by the offset correction loop.
The MAX3746 limiting amplifier’s CML output provides
high tolerance to impedance mismatches and inductive
connectors. The OUTPOL setting programs the output
current. Connecting the DISABLE pin to V
the output. If the LOS pin is connected to the DISABLE
pin, the outputs OUT+ and OUT- are at a static voltage
(squelch) whenever the input signal level drops below
the LOS threshold. The output common mode remains
constant when the part is disabled. The output buffer
can be AC- or DC-coupled to the load (Figure 4).
FUNCTION
TH
Limiting Amplifier
) sets the LOS threshold.
Offset Correction Loop
Pin Description
CML Output Buffer
CC
disables
7