LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 34
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
(227 pages)
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Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
6.2
6.3
6.3.1
Note:
6.3.2
6.3.3
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
LAD[3:0]
nLFRAME
nPCI_RESET
nLDRQ
nIO_PME
nLPCPD
SER_IRQ
PCI_CLK
SIGNAL
NAME
Host Processor Interface (LPC)
The host processor communicates with the LPC47M172 through a series of read/write registers via the
LPC interface. The port addresses for these registers are shown in Table 6.1. Register access is
accomplished through I/O cycles or DMA transfers. All registers are 8 bits wide.
LPC Interface
The following sub-sections specify the implementation of the LPC bus.
LPC Interface Signal Definition
The signals required for the LPC bus interface are described in the table below. LPC bus signals use PCI
33MHz electrical signal characteristics.
The CLKRUN# signal is not implemented in this part.
LPC Cycles
The following cycle types are supported by the LPC protocol.
LPC47M172 ignores cycles that it does not support.
Field Definitions
The data transfers are based on specific fields that are used in various combinations, depending on the
cycle type. These fields are driven onto the LAD[3:0] signal lines to communicate address, control and
data information over the LPC bus between the host and the LPC47M172. See the Low Pin Count (LPC)
Interface Specification Revision 1.0 from Intel, Section 4.2 for definition of these fields.
I/O Write
I/O Read
DMA Write
DMA Read
I/O
Input
Input
Output
OD
Input
I/O
Input
TYPE
LPC address/data bus. Multiplexed command, address and data bus.
Frame signal. Indicates start of new cycle and termination of broken cycle
PCI Reset. Used as LPC Interface Reset.
Encoded DMA/Bus Master request for the LPC interface.
Power Mgt Event signal. Allows the LPC47M172 to request wakeup.
Powerdown Signal. Indicates that the LPC47M172 should prepare for power to be shut
on the LPC interface.
Serial IRQ.
PCI Clock.
CYCLE TYPE
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SMSC LPC47M172
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