74VCXH162244MTD Fairchild Semiconductor, 74VCXH162244MTD Datasheet
74VCXH162244MTD
Specifications of 74VCXH162244MTD
Related parts for 74VCXH162244MTD
74VCXH162244MTD Summary of contents
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... CMOS power dissipation. Ordering Code: Package Order Number Number 74VCXH162244MTD 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide MTD48 [TUBES] 74VCXH162244MTX MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide ...
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Connection Diagram Functional Description The 74VCXH162244 contains sixteen non-inverting buffers with 3-STATE outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of each other. The control pins may be shorted together to obtain full ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( – Output Voltage ( Outputs 3-STATE Outputs Active (Note 3) 0. ...
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DC Electrical Characteristics Symbol Parameter V LOW Level Output Voltage OL I Input Leakage Current Control Pins I Data Pins I Bushold Input Minimum I(HOLD) Drive Hold Current I Bushold Input Over-Drive I(OD) Current to Change State I 3-STATE Output ...
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AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL t PLH t Output Enable Time PZL t PZH t Output Disable Time PLZ t PHZ t Output-to-Output Skew OSHL t (Note 9) OSLH Note 8: For add ...
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AC Loading and Waveforms (V TEST PLH PZL PZH FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE ...
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AC Loading and Waveforms (V TEST PLH PHL PZL PLZ PZH PHZ FIGURE 6. Waveform for Inverting and Non-Inverting Functions FIGURE 7. 3-STATE Output High Enable and Disable Times for Low ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...