STA323W ST Microelectronics, STA323W Datasheet - Page 17
STA323W
Manufacturer Part Number
STA323W
Description
2.1 High Efficiency Digital Audio System
Manufacturer
ST Microelectronics
Datasheet
1.STA323W.pdf
(41 pages)
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DataSheet
Table 12. DDX® Output Modes
7.4.2 5.3.2DDX® Variable Compensating Pulse Size
The DDX® variable compensating pulse size is intended to adapt to different power stage ICs. Contact
Apogee applications for support when deciding this function.
Table 13. DDX® Compensating Pulse
7.5 Configuration Register D (Address 03h)
7.5.1 High-Pass Filter Bypass
The STA323W features an internal digital high-pass filter for the purpose of DC Blocking. The purpose of
this filter is to prevent DC signals from passing through a DDX® amplifier. DC signals can cause speaker
damage.
7.5.2 De-Emphasis
By setting this bit to HIGH, or one (1), de-emphasis will implemented on all channels. DSPB (DSP Bypass,
Bit D2, CFA) bit must be set to 0 for De-emphasis to function.
BIT
BIT
4
MME
1
0
D7
0
U
.com
CSZ (4…0)
00000
00001
10000
11111
…
…
R/W
R/W
R/W
R/W
OM (1,0)
ZDE
D6
00
01
10
11
0
RST
0
RST
0 Clock period Compensating Pulse Size
1 Clock period Compensating Pulse Size
…
16 Clock period Compensating Pulse Size
…
31 Clock period Compensating Pulse Size
0
DRC
D5
0
NAME
HPB
NAME
DEMP
BQL
D4
DataSheet4U.com
0
High-Pass Filter Bypass Bit.
0 – AC Coupling High Pass Filter Enabled
1 – AC Coupling High Pass Filter Disabled
Compensating Pulse Size
PSL
D3
0
De-emphasis:
0 – No De-emphasis
1 – De-emphasis
Variable Compensation
Output Stage – Mode
DDX-2060/2100/2160
DSPB
Not Used
Not Used
D2
0
DESCRIPTION
DESCRIPTION
DEMP
D1
0
STA323W
HPB
D0
0
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DataShee