IDT70T633 Integrated Device Technology, IDT70T633 Datasheet - Page 21

• Manufacturer Part Number: IDT70T633
• Description: 512k X 18, 3.3v/2.5v Dual-port Ram, Interleaved I/o
• Manufacturer: Integrated Device Technology

Truth Table V — Example of Semaphore Procurement Sequence
Functional Description
and I/O pins that permit independent access for reads or writes to any
location in memory. The IDT70T633/1 has an automatic power down
feature controlled by CE. The CE
down circuitry that permits the respective port to go into a standby mode
when not selected (CE = HIGH). When a port is enabled, access to the
entire memory array is permitted.
Interrupts
Truth Table IV —
Address BUSY Arbitration
NOTES:
1. Pins BUSY
2. "L" if the inputs to the opposite port were stable prior to the address and enable inputs of this port. "H" if the inputs to the opposite port became stable after the address
3. Writes to the left port are internally ignored when BUSY
4. A
5. CE
NOTES:
1. This table denotes a sequence of events for only one of the eight semaphores on the IDT70T633/1.
2. There are eight semaphore flags written to via I/O
3. CE
box or message center) is assigned to each port. The left port interrupt
No Action
Left Port Writes "0" to Semaphore
Right Port Writes "0" to Semaphore
Left Port Writes "1" to Semaphore
Left Port Writes "0" to Semaphore
Right Port Writes "1" to Semaphore
Left Port Writes "1" to Semaphore
Right Port Writes "0" to Semaphore
Right Port Writes "1" to Semaphore
Left Port Writes "0" to Semaphore
Left Port Writes "1" to Semaphore
CE
IDT70T633/1S
High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM
X
H
X
L
The IDT70T633/1 provides two ports with separate control, address
If the user chooses the interrupt function, a memory location (mail
L
IDT70T633/1 are push-pull, not open drain outputs. On slaves the BUSY input internally inhibits writes.
and enable inputs of this port. If t
when BUSY
(5)
18
0
X
is a NC for IDT70T631. Address comparison will be for A
= V
CE
= L means CE
X
X
H
L
R
IH
(5)
, CE
Inputs
L
R
and BUSY
Functions
outputs are driving LOW regardless of actual logic level on the pin.
1
NO MATCH
= SEM = V
A
A
MATCH
MATCH
MATCH
0L
0R
0
X
-A
-A
= V
18L
18R
R
are both outputs when the part is configured as a master. Both are inputs when configured as a slave. BUSY outputs on the
IL
(4)
and CE
IL
to access the semaphores. Refer to the Semaphore Read/Write Control Truth Table.
BUSY
APS
0
1
X
and CE
(2)
H
H
H
is not met, either BUSY
= V
L
Outputs
(1)
IH
. CE
1
BUSY
control the on-chip power
D
X
0
= H means CE
(2)
- D
0
H
H
H
and read from all I/O's (I/O
R
L
1
1
1
1
1
1
1
17
0
0
0
0
(1)
outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored
Left
Write Inhibit
L
Function
or BUSY
0
Normal
Normal
Normal
0
- A
X
= V
17
5670 tbl 18
D
.
0
IH
R
- D
(3)
and/or CE
= LOW will result. BUSY
17
1
1
1
1
1
1
1
1
0
0
0
21
Right
0
-I/O
flag (INT
7FFFE (HEX), where a write is defined as CE
Truth Table. The left port clears the interrupt through access of
address location 7FFFE when CE
Likewise, the right port interrupt flag (INT
port writes to memory location 7FFFF (HEX) and to clear the interrupt
flag (INT
message (18 bits) at 7FFFE or 7FFFF (3FFFF or 3FFFE for IDT70T631)
is user-defined since it is an addressable SRAM location. If the interrupt
function is not used, address locations 7FFFE and 7FFFF are not used
as mail boxes, but as part of the random access memory. Refer to Truth
Table III for the interrupt operation.
1
X
17
= V
). These eight semaphores are addressed by A
Semaphore free
Left port has semaphore token
No change. Right side has no write access to semaphore
Right port obtains semaphore token
No change. Left port has no write access to semaphore
Left port obtains semaphore token
Semaphore free
Right port has semaphore token
Semaphore free
Left port has semaphore token
Semaphore free
IL
.
R
L
) is asserted when the right port writes to memory location
), the right port must read the memory location 7FFFF. The
L
and BUSY
Industrial and Commercial Temperature Ranges
R
outputs can not be LOW simultaneously.
L
Status
= OE
L
R
= V
) is asserted when the left
0
IL
R
- A
, R/W is a "don't care".
= R/W
2
.
(1,2,3)
R
= V
IL
5670 tbl 19
per the