IDT71V2556S Integrated Device Technology, IDT71V2556S Datasheet - Page 19

• Manufacturer Part Number: IDT71V2556S
• Description: 128k X 36, 256k X 18 3.3v Synchronous Zbt Srams 2.5v I/o, Burst Counter Pipelined Outputs
• Manufacturer: Integrated Device Technology

NOTES:
1. Q (A
) represents the first output from the external address A
. D (A
) represents the input data to the SRAM corresponding to address A
.
1
1
2
2
2. CE
timing transitions are identical but inverted to the CE
and CE
signals. For example, when CE
and CE
are LOW on this waveform, CE
is HIGH.
2
1
2
2
2
1
3. Individual Byte Write signals (BWx) must be valid on all write and burst-write cycles. A write cycle is initiated when R/W signal is sampled LOW. The byte write information comes in two
cycles before the actual data is presented to the SRAM.