LMX2305 National Semiconductor, LMX2305 Datasheet - Page 6

• Manufacturer Part Number: LMX2305
• Description: PLLatinumTM 550 MHz Frequency Synthesizer for RF Personal Communications
• Manufacturer: National Semiconductor

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Functional Description
The simplified block diagram below shows the 19-bit data register the 14-bit R Counter and the R15 Latch and the 18-bit
N Counter (intermediate latches are not shown) The data stream is clocked (on the rising edge) into the DATA input MSB first
If the Control Bit (last bit input) is HIGH the DATA is transferred into the R Counter (programmable reference divider) and the
S Latch (prescaler select 64 65 or 128 129) If the Control Bit (LSB) is LOW the DATA is transferred into the N Counter
(programmable divider)
PROGRAMMABLE REFERENCE DIVIDER (R COUNTER) AND PRESCALER SELECT (R15 LATCH)
If the Control Bit (last bit shifted into the Data Register) is HIGH data is transferred from the 19-bit shift register into a 14-bit
latch (which sets the 14-bit R Counter) and the 1-bit R15 Latch which sets the prescaler 64 65 or 128 129 Serial data format
is shown below
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14-BIT PROGRAMMABLE REFERENCE DIVIDER RATIO
(R COUNTER)
Notes Divide ratios less than 3 are prohibited
Divide
16383
Ratio
R
3
4
Divide ratio 3 to 16383
R1 to R14 These bits select the divide ratio of the programmable
reference divider
C Control bit (set to HIGH level to load R counter and R15 Latch)
Data is shifted in MSB first
14
R
0
0
1
13
R
0
0
1
12
R
0
0
1
11
R
0
0
1
10
R R
0
0
1
9
0 0 0 0 0 0 0 1 1
0 0 0 0 0 0 1 0 0
1 1 1 1 1 1 1 1 1
R
8
R
7
R
6
R
5
R
4
R
3
6
R
2
R
1
1-BIT PRESCALER SELECT
(R15 LATCH)
Prescaler
128 129
Select
64 65
P
TL W 12459 – 14
15
R
0
1
TL W 12459 – 1