ADP315PC87570 National Semiconductor, ADP315PC87570 Datasheet - Page 107

• Manufacturer Part Number: ADP315PC87570
• Description: Keyboard and Power Management Controller
• Manufacturer: National Semiconductor

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14.3 CLOCK SOURCE UNIT
The clock source unit, Figure 14-2, contains two clock se-
lectors for each counter and a 5-bit clock prescaler.
14.3.1 Prescaler
The 5-bit clock prescaler consists of a prescaler register,
and a 5-bit counter, allowing you to run the timer with a
prescaled clock. The system clock is divided by the value
14.3.2 External Event Clock
The TB I/O pin can be selected as an external event input
clock source for any of the two 16-bit counters. The polarity
of the input signal is user programmable to generate a count
if either a rising or a falling edge is detected on TB. The min-
imum pulse width of the external signal is one system clock
cycle, thus the maximum frequency with which the counter
can run in this mode is limited to half the system clock fre-
quency. This clock source is not available in the dual-chan-
nel capture modes because TB is used as a capture input.
14.3.3 Pulse Accumulate Mode
In pulse accumulate mode, the counter can also be clocked
while an external signal on TB is either high or low. In this
configuration, the output of the prescaler is gated with an
external signal applied on the TB input. This mode can be
used to obtain a cumulative count of prescaler output clock
pulses, as shown in Figure 14-3.
TB
Slow Speed
Clock
Prescaler Output
System
Counter Clock
Reset
Clock
TnB
Prescaler Counter
Synchr.
Synchr.
Prescaler Register
TPRSC
5-Bit
Figure 14-2. Clock Prescaler and Selector
Figure 14-3. Pulse Accumulate Mode
Multi-Function 16-Bit Timer (MFT16)
107
No Clock
Accumulate
Prescaled
contained in TPRSC+1. The minimum counter clock
frequency is thus the system clock divided by 32, and the
maximum counter clock frequency is equal to the system
clock. The prescaler register, TPRSC, can be read or
written by the user software at any time. The prescaler
counter is a 5-bit down counter which can not be read or
written by software. The 5-bit counter, and the prescaler
register TPRSC, are cleared on reset
Pulse accumulate mode is not available in the dual-channel
capture mode which requires TB as an input. (See Section
14.4.1 for more details on the availability of TB.)
14.3.4 Slow Speed Clock
A slow speed clock of 32.768 KHz can be used as a clock
source for the two 16-bit counters. The MFT16 synchroniz-
es the slow speed clock with the system clock. Therefore,
the maximum input frequency of the slow speed clock is the
system clock rate divided by four.
Some power save modes stop the system clock completely.
When this occurs, the timer stops counting the slow speed
clock until the system clock resumes. While operating in a
power save mode that uses a slow system clock, the slow
speed clock source for the timer can only be used if it is at
least four times faster than the slow speed clock for the
counter.
External
Clock
Event
Pulse
Counter 1
Counter 2
Select
Clock
Select
Clock
Counter 1
Clock
Counter 2
Clock