AN1356 STMicroelectronics, AN1356 Datasheet - Page 47
AN1356
Manufacturer Part Number
AN1356
Description
PSDSOFT EXPRESS AND PSD4235G2 DESIGN GUIDE
Manufacturer
STMicroelectronics
Datasheet
1.AN1356.pdf
(49 pages)
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AN1356 - APPLICATION NOTE
Figure 53. CSBOOT2 Address Range
Figure 54. CSBOOT3 Address Range
Notice that these PSD physical memory segments can appear in more that one MCU address space
depending on the “swap” and “unlock” qualifiers. Now the memory maps of Figure 45 through to Figure
48 have been implemented. Click Done and you should see the main flow diagram.
Finishing the design
There’s no need to edit the the ABEL HDL statements since we have not touched the CPLD. Click the ‘Fit
Design to Silicon’ box. After a successful fit, click the ‘Merge MCU Firmware’ box. You will see an
informational dialog box pop up that indicates non-natural address signals were used in PSD chip-select
equations. This is because of the “swap” and “unlock bits”. PSDsoft displays this message to remind you
that your MCU compiler/linker should account for any non-naturual MCU address signals. Click OK, since
this does not apply to our example.
Now specify the file name \PSDsoft\Examples\boot_16K.hex for segments csboot0 and csboot1. There is
no P51XA firmware in this file, it is used only for illustration. You will find the pattern AAh in csboot0, and
the pattern BBh in csboot1. No firmware filename needs to be designated for the main PSD Flash memory
segments (fs0 – fs7) since they will be programmed by the P51XA during IAP. No firmware file needs to
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