FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 114
FDC37C672QFP
Manufacturer Part Number
FDC37C672QFP
Description
ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer
SMSC Corporation
Datasheet
1.FDC37C672QFP.pdf
(173 pages)
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17.1.7 KIRQ
17.1.8 MIRQ
17.1.9 Gate A20
17.2
Note:
17.3
17.3.1 Soft Power Down Mode
SMSC FDC37C672
If "EN FLAGS" has been executed and P24 is set to a one: the OBF flag is gated onto KIRQ. The KIRQ
signal can be connected to system interrupt to signify that the FDC37C672 CPU has written to the output
data register via "OUT DBB,A". If P24 is set to a zero, KIRQ is forced low. On power-up, after a valid RST
pulse has been delivered to the device, KIRQ is reset to 0. KIRQ will normally reflects the status of writes
"DBB". (KIRQ is normally selected as IRQ1 for keyboard support.)
If "EN FLAGS” has not been executed: KIRQ can be controlled by writing to P24. Writing a zero to P24
forces KIRQ low; a high forces KIRQ high.
If "EN FLAGS" has been executed and P25 is set to a one:; IBF is inverted and gated onto MIRQ. The
MIRQ signal can be connected to system interrupt to signify that the FDC37C672 CPU has read the DBB
register.
If "EN FLAGS” has not been executed, MIRQ is controlled by P25. Writing a zero to P25 forces MIRQ low,
a high forces MIRQ high. (MIRQ is normally selected as IRQ12 for mouse support.)
A general purpose P21 is used as a software controlled Gate A20 or user defined output.
External Keyboard and Mouse Interface
Industry-standard PC-AT-compatible keyboards employ a two-wire, bidirectional TTL interface for data
transmission. Several sources also supply PS/2 mouse products that employ the same type of interface.
To facilitate system expansion, the FDC37C672 provides four signal pins that may be used to implement
this interface directly for an external keyboard and mouse.
The FDC37C672 has four high-drive, open-drain output, bidirectional port pins that can be used for external
serial interfaces, such as ISA external keyboard and PS/2-type mouse interfaces. They are KCLK, KDAT,
MCLK, and MDAT. P26 is inverted and output as KCLK. The KCLK pin is connected to TEST0. P27 is inverted
and output as KDAT. The KDAT pin is connected to P10. P23 is inverted and output as MCLK. The MCLK pin is
connected to TEST1. P22 is inverted and output as MDAT. The MDAT pin is connected to P11.
External pull-ups may be required.
Keyboard Power Management
The keyboard provides support for two power-saving modes: soft powerdown mode and hard powerdown
mode. In soft powerdown mode, the clock to the ALU is stopped but the timer/counter and interrupts are
still active. In hard power down
This mode is entered by executing a HALT instruction. The execution of program code is halted until
either RESET is driven active or a data byte is written to the DBBIN register by a master CPU. If this
mode is exited using the interrupt, and the IBF interrupt is enabled, then program execution resumes with
mode the clock to the 8042 is stopped.
DATASHEET
Page 114
Enhanced Super I/O Controller with Fast IR
Rev. 10-29-03
Datasheet
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