FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 151
FDC37C672QFP
Manufacturer Part Number
FDC37C672QFP
Description
ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer
SMSC Corporation
Datasheet
1.FDC37C672QFP.pdf
(173 pages)
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Enhanced Super I/O Controller with Fast IR
Datasheet
Note 21.12 The RESET width is dependent upon the processor clock. The RESET must be active while the clock is
SMSC FDC37C672
NAME
NAME
t1
t2
t1
t2
t4
CLOCKI
RESET_DRV
Clock Cycle Time for 14.318MHZ
Clock High Time/Low Time for 14.318MHz
Clock Cycle Time for 32KHZ
Clock High Time/Low Time for 32KHz
Clock Rise Time/Fall Time (not shown)
RESET width (Note 21.12)
running and stable.
DESCRIPTION
DESCRIPTION
Figure 21.6 - Input Clock Timing
Figure 21.7 - Reset Timing
DATASHEET
Page 151
t1
t4
t2
MIN
MIN
1.5
t2
31.25
16.53
TYP
70
35
TYP
MAX
MAX
5
Rev. 10-29-03
UNITS
UNITS
µs
ns
µs
µs
ns
ns
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