LM3S6110 Luminary Micro, Inc, LM3S6110 Datasheet - Page 380
LM3S6110
Manufacturer Part Number
LM3S6110
Description
Lm3s6110 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6110.pdf
(472 pages)
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Reset
Reset
Type
Type
Pulse Width Modulator (PWM)
PWM Master Control (PWMCTL)
Base 0x4002.8000
Offset 0x000
Type R/W, reset 0x0000.0000
380
Bit/Field
31:1
0
RO
RO
31
15
0
0
Register 1: PWM Master Control (PWMCTL), offset 0x000
This register provides master control over the PWM generation block.
RO
RO
30
14
0
0
GlobalSync0
reserved
RO
RO
29
13
0
0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
26
10
0
0
Reset
0x00
RO
RO
25
0
9
0
0
Preliminary
reserved
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Update PWM Generator 0
Setting this bit causes any queued update to a load or comparator
register in PWM generator 0 to be applied the next time the
corresponding counter becomes zero. This bit automatically clears when
the updates have completed; it cannot be cleared by software.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
July 25, 2008
RO
RO
17
0
1
0
GlobalSync0
R/W
RO
16
0
0
0
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