LM3S6633 Luminary Micro, Inc, LM3S6633 Datasheet - Page 25
LM3S6633
Manufacturer Part Number
LM3S6633
Description
Lm3s6633 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6633.pdf
(534 pages)
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- Download datasheet (6Mb)
July 25, 2008
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ARM FiRM-compliant Watchdog Timer
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10/100 Ethernet Controller
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Synchronous Serial Interface (SSI)
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16-bit Input Capture modes
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16-bit PWM mode
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32-bit down counter with a programmable load register
Separate watchdog clock with an enable
Programmable interrupt generation logic with interrupt masking
Lock register protection from runaway software
Reset generation logic with an enable/disable
User-enabled stalling when the controller asserts the CPU Halt flag during debug
Conforms to the IEEE 802.3-2002 Specification
Full- and half-duplex for both 100 Mbps and 10 Mbps operation
Integrated 10/100 Mbps Transceiver (PHY)
Automatic MDI/MDI-X cross-over correction
Programmable MAC address
Power-saving and power-down modes
Master or slave operation
Programmable clock bit rate and prescale
Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
Programmable data frame size from 4 to 16 bits
Programmable periodic timer
User-enabled stalling when the controller asserts CPU Halt flag during debug
ADC event trigger
Input edge count capture
Input edge time capture
Simple PWM mode with software-programmable output inversion of the PWM signal
Preliminary
LM3S6633 Microcontroller
25
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