LM3S6952 Luminary Micro, Inc, LM3S6952 Datasheet - Page 499
LM3S6952
Manufacturer Part Number
LM3S6952
Description
Lm3s6952 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6952.pdf
(601 pages)
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Reset
Reset
Type
Type
PWM0 Compare A (PWM0CMPA)
Base 0x4002.8000
Offset 0x058
Type R/W, reset 0x0000.0000
July 25, 2008
Bit/Field
31:16
15:0
R/W
RO
31
15
0
0
R/W
Register 22: PWM0 Compare A (PWM0CMPA), offset 0x058
Register 23: PWM1 Compare A (PWM1CMPA), offset 0x098
These registers contain a value to be compared against the counter (PWM0CMPA controls the
PWM generator 0 block, and so on). When this value matches the counter, a pulse is output; this
can drive the generation of a PWM signal (via the PWMnGENA/PWMnGENB registers) or drive an
interrupt or ADC trigger (via the PWMnINTEN register). If the value of this register is greater than
the PWMnLOAD register (see page 497), then no pulse is ever output.
If the comparator A update mode is immediate (based on the CmpAUpd bit in the PWMnCTL register),
this 16-bit CompA value is used the next time the counter reaches zero. If the update mode is
synchronous, it is used the next time the counter reaches zero after a synchronous update has been
requested through the PWM Master Control (PWMCTL) register (see page 482). If this register is
rewritten before the actual update occurs, the previous value is never used and is lost.
RO
30
14
0
0
R/W
reserved
RO
29
13
CompA
0
0
Name
R/W
RO
28
12
0
0
R/W
RO
27
11
0
0
Type
R/W
RO
R/W
RO
26
10
0
0
Reset
0x00
0x00
R/W
RO
25
0
9
0
Preliminary
R/W
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Comparator A Value
The value to be compared against the counter.
reserved
CompA
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
LM3S6952 Microcontroller
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
499
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