LM3S2730 Luminary Micro, Inc, LM3S2730 Datasheet - Page 15

• Manufacturer Part Number: LM3S2730
• Description: Lm3s2730 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

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Synchronous Serial Interface (SSI) ............................................................................................ 274
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Controller Area Network (CAN) Module ..................................................................................... 311
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July 25, 2008
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 267
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 268
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 269
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 270
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 271
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 272
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 273
SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 286
SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 288
SSI Data (SSIDR), offset 0x008 ...................................................................................... 290
SSI Status (SSISR), offset 0x00C ................................................................................... 291
SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 293
SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 294
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .............................................................. 296
SSI Masked Interrupt Status (SSIMIS), offset 0x01C ........................................................ 297
SSI Interrupt Clear (SSIICR), offset 0x020 ....................................................................... 298
SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0 ............................................. 299
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4 ............................................. 300
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8 ............................................. 301
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 302
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 303
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 304
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 305
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 306
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 307
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 308
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 309
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 310
CAN Control (CANCTL), offset 0x000 ............................................................................. 324
CAN Status (CANSTS), offset 0x004 ............................................................................... 326
CAN Error Counter (CANERR), offset 0x008 ................................................................... 329
CAN Bit Timing (CANBIT), offset 0x00C .......................................................................... 330
CAN Interrupt (CANINT), offset 0x010 ............................................................................. 332
CAN Test (CANTST), offset 0x014 .................................................................................. 333
CAN Baud Rate Prescalar Extension (CANBRPE), offset 0x018 ....................................... 335
CAN IF1 Command Request (CANIF1CRQ), offset 0x020 ................................................ 336
CAN IF2 Command Request (CANIF2CRQ), offset 0x080 ................................................ 336
CAN IF1 Command Mask (CANIF1CMSK), offset 0x024 .................................................. 337
CAN IF2 Command Mask (CANIF2CMSK), offset 0x084 .................................................. 337
CAN IF1 Mask 1 (CANIF1MSK1), offset 0x028 ................................................................ 340
CAN IF2 Mask 1 (CANIF2MSK1), offset 0x088 ................................................................ 340
CAN IF1 Mask 2 (CANIF1MSK2), offset 0x02C ................................................................ 341
CAN IF2 Mask 2 (CANIF2MSK2), offset 0x08C ................................................................ 341
CAN IF1 Arbitration 1 (CANIF1ARB1), offset 0x030 ......................................................... 342
CAN IF2 Arbitration 1 (CANIF2ARB1), offset 0x090 ......................................................... 342
CAN IF1 Arbitration 2 (CANIF1ARB2), offset 0x034 ......................................................... 343
Preliminary
LM3S2730 Microcontroller
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